APLUS INTEGRATED CIRCUITS INC. APC5800E
=1 ꢁENTRY SLEEP MODE. IN SLEEP MODE , THE BOTH OF MAIN
SYSTEM CLOCK AND 32768HZ WILL BESTOPPED, SO ALL
FUNCTION ARE STOPPED AND ONLY EXTERNAL INTERRUPT
CAN WAKE UP THIS CHIP
BIT - 1
00 : SYSTEM CLOCK = FXOSC/2 X 256(4.19MHZ)(DEFAULT).
01 : SYSTEM CLOCK = FXOSC/2 X 512(8.38MHZ)
10 : SYSTEM CLOCK = FXOSC/2 X 768(12.58MHZ)
0XXX : FIX-TIMER DISABLE.
BIT – 3 ~ 2
BIT- 7 ~ 4
1000 : FIX-TIMER = 64HZ.
1001 : FIX-TIMER = 32HZ.
1010 : FIX-TIMER = 16HZ.
1011 : FIX-TIMER = 8HZ.
1100 : FIX-TIMER = 4HZ.
1101 : FIX-TIMER = 2HZ.
1110 : FIX-TIMER = 1HZ.
1111 : FIX-TIMER = 0.5HZ
ꢀ 3FE3 : PORT_A[7..0] INTERRUPT ENABLE REGISTER. WRITE ONLY.
AN ‘0’ IN THIS REGISTER WILL SET THE INTERRUPT FUNCTION OF THE CORRESPONDING PIN OF
PORT_A TO BE ENABLED. THE DEFAULT VALUE FOR EACH BIT IS ‘1’.
ꢀ 3FE4 : PORT_A[7..0] DATA REGISTER. READ AND WRITE.
ꢀ 3FE5 : PORT_A[7..0] DIRECTION REGISTER. WRITE ONLY.
AN ‘1’ IN THIS REGISTER WILL SET THE CORRESPONDING PIN OF PORT_A TO BE OUTPUT.
THE DEFAULT VALUE FOR EACH BIT IS ZERO.
ꢀ 3FE6: PORT_B[7..0] DATA REGISTER. WRITE ONLY.
ꢀ 3FE7 : CLEAR WATCHDOG TIMER. WRITE ONLY.
THE WATCHDOG TIMER RESET WILL HAPPEN IF THE PROGRAMMER DO NOT CLEAR THE
WATCHDOG TIMER BEFORE WATCHDOG TIMER TIME-OUT.
ꢀ 3FE8 VOICE CHANNEL 0 LOW BYTE. WRITE ONLY.
BIT 2-0 : RESERVED.
BIT 3: NO USE (MUST 0)
BIT 7-4: = VOICE CHANNEL 0 LOW NIBBLE BYTE.
ꢀ 3FE9 : VOICE CHANNEL 0 HIGH BYTE. WRITE ONLY.
THE RESOLUTION OF VOICE CHANNEL 0 IS 12 BITS($3FE9,$3FE8 BIT7_4).
7
www.aplusinc.com.tw
TEL : 886-2-2782-9266
APLUS [ APLUS INTERGRATED CIRCUITS ]
