ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
PB51 • PB51A
SUPPLY VOLTAGE, +VS to –VS
300V
2.0A
83W
±15V
260°C
175°C
ABSOLUTE MAXIMUM RATINGS
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal at TC = 25°C1
INPUT VOLTAGE, referred to COM
TEMPERATURE, pin solder—10s max.
TEMPERATURE, junction1
TEMPERATURE RANGE, storage
OPERATING TEMPERATURE RANGE, case
–40 to +85°C
–25 to +85°C
SPECIFICATIONS
PARAMETER
PB51
TYP
PB51A
TYP
TEST CONDITIONS2
MIN
MAX
MIN
MAX UNITS
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
CLOSED LOOP GAIN RANGE
GAIN ACCURACY, internal Rg, Rf
GAIN ACCURACY, external Rf
PHASE SHIFT
±.75
–4.5
50
3
10
±10
±15
10
±1.75
–7
*
*
*
*
*
*
*
*
*
±1.0
*
V
Full temperature range3
mV/°C
25
3
*
*
k
pF
V/V
%
%
°
25
±15
±25
*
*
*
AV= 3
AV= 10
f = 10kHz, AVCL = 10, CC= 22pF
f = 200kHz, AVCL = 10, CC= 22pF
60
°
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
VOLTAGE SWING
CURRENT, continuous
SLEW RATE
CAPACITIVE LOAD
SETTLING TIME to .1%
POWER BANDWIDTH
SMALL SIGNAL BANDWIDTH
SMALL SIGNAL BANDWIDTH
Io = 1.5A (PB58), 2A (PB58A)
Io = 1A
Io = .1A
VS–11 VS–8
VS–10 VS–7
VS–15 VS–11
V
V
V
A
V/µs
pF
*
*
*
*
VS–8
1.5
VS–5
2.0
75
Full temperature range
Full temperature range
RL= 100, 2V step
VC = 100 Vpp
CC = 22pF, AV = 25, Vcc = ±100
CC = 22pF, AV = 3, Vcc = ±30
50
100
2200
2
*
*
*
*
*
*
µs
160
320
100
1
240
kHz
kHz
MHz
POWER SUPPLY
VOLTAGE, ±VS4
CURRENT, quiescent
Full temperature range
VS = ±15
VS = ±60
±156
±60
11
12
±150
18
*
*
*
*
*
*
*
V
mA
mA
mA
VS = ±150
14
THERMAL
RESISTANCE, AC junction to case5
RESISTANCE, DC junction to case
RESISTANCE, junction to air
TEMPERATURE RANGE, case
Full temp. range, f > 60Hz
Full temp. range, f < 60Hz
Full temperature range
1.2
1.6
30
1.3
1.8
*
*
*
*
*
*
°C/W
°C/W
°C/W
°C
Meets full range specifications
–25
25
85
*
*
NOTES:
*
The specification of PB51A is identical to the specification for PB51 in applicable column to the left.
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to
achieve high MTTF (Mean Time to Failure).
2. The power supply voltage specified under typical (TYP) applies, TC = 25°C unless otherwise noted.
3. Guaranteed by design but not tested.
4. +V and –VS denote the positive and negative supply rail respectively.
5. RaSting applies if the output current alternates between both output transistors at a rate faster than 60Hz.
6. +VS/–VS must be at least 15V above/below COM.
The PB51 is constructed from MOSFET transistors. ESD handling procedures must be observed.
CAUTION
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to
temperatures in excess of 850°C to avoid generating toxic fumes.
2APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
APEX [ CIRRUS LOGIC ]
