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CS5490-ISZ 参数 Datasheet PDF下载

CS5490-ISZ图片预览
型号: CS5490-ISZ
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道电能计量IC [Two Channel Energy Measurement IC]
分类和应用:
文件页数/大小: 56 页 / 753 K
品牌: APEX [ CIRRUS LOGIC ]
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CS5490  
2. PIN DESCRIPTION  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
XOUT  
XIN  
RESET  
IIN-  
VDDD  
MODE  
RX  
TX  
DO  
VDDA  
GNDA  
VREF+  
IIN+  
VIN+  
VIN-  
VREF-  
Clock Generator  
Crystal In  
2,1  
XIN, XOUT — Connect to an external quartz crystal. Alternatively, an external clock can be  
supplied to the XIN pin to provide the system clock for the device.  
Crystal Out  
Control Pins and Serial Data I/O  
Digital Output  
12  
DO — Configurable digital output for energy pulses, interrupt, energy direction, and  
zero-crossings.  
Reset  
3
RESET — An active-low Schmitt-trigger input used to reset the chip.  
TX, RX — UART serial data output/input.  
Serial Interface  
13,14  
15  
Operating Mode Select  
Analog Inputs/Outputs  
Voltage Input  
MODE — Connect to VDDA for proper operation.  
6,7  
5,4  
9,8  
VIN+, VIN- — Differential analog input for the voltage channel.  
IIN+, IIN- — Differential analog input for the current channel.  
VREF+, VREF- — The voltage reference output and return.  
Current Input  
Voltage Reference Input  
Power Supply Connections  
Internal Digital Supply  
Positive Analog Supply  
Analog Ground  
16  
11  
10  
VDDD — Decoupling pin for the internal digital supply.  
VDDA — The positive analog supply.  
GNDA — Analog ground.  
2.1.2 Current Input  
2.1 Analog Pins  
The output of the current-sensing shunt resistor or  
transformer is connected to the IINinput pins of the  
CS5490. To accommodate different current-sensing  
The CS5490 has two differential inputs, one for voltage  
(VIN) and one for currentIIN). The CS5490 also has  
two voltage reference pins (VREF) between which a  
0.1µ bypass capacitor must be placed.  
elements, the current channel incorporates  
a
programmable gain amplifier (PGA) with two selectable  
input gains, as described in the Config0 register  
description 6.6.1 Configuration 0 (Config0) – Page 0,  
Address 0 on page 31. There is a 10x gain setting and  
a 50x gain setting. The full-scale signal level for the  
current channel is ±50mV and ±250mV for 50x and 10x  
gain settings, respectively. If the input signal is a sine  
2.1.1 Voltage Input  
The output of the line voltage resistive divider or  
transformer is connected to the VINinput of the  
CS5490. The voltage channel is equipped with a 10x,  
fixed-gain amplifier. The full-scale signal level that can  
be applied to the voltage channel is ±250 mV. If the  
input signal is a sine wave, the maximum RMS  
wave, the maximum RMS voltage is 35.35 mV  
or  
RMS  
176.78mV  
, which is approximately 70.7% of  
RMS  
voltage is 250mVp / 2 176.78mV  
approximately 70.7% of maximum peak voltage.  
,
which is  
RMS  
maximum peak voltage.  
6
DS982F2