CS1630/31
3.2
I
2
C Port Switching Characteristics
Test conditions (unless otherwise specified):
• Inputs: Logic 0 = GND = 0V, Logic 1 = 3.3V.
• The CS1630/31 control port only supports I
2
C slave functionality.
• It is recommended that a 2.2k pull-up resistor be placed from the SDA pin to V
DD
.
Parameter
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Input Hold Time from SCL Falling
SDA Setup time to SCL Rising
Setup Time for Stop Condition
SDA Input Voltage Low
SDA Input Voltage High
SDA Output Voltage Low
Symbol
f
scl
t
buf
t
hdst
t
low
t
high
t
sust
t
hddi
t
sud
t
susp
V
il
V
ih
V
ol
Min
-
1.3
0.6
1.3
0.6
0.6
0
100
0.6
-
-
-
Typ
-
-
-
-
-
-
-
-
-
1.5
1.85
0.25
Max
400
-
-
-
-
-
0.9
-
-
-
-
-
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
V
V
V
Re pe ate d
Stop
S ta rt
Sta rt
Stop
SD A
t
buf
t
hdst
t
high
t
hdst
t
f
t
susp
SCL
t
low
t
hddi
t
sud
t
hddo
t
sust
t
r
8
DS954F2
APEX [ CIRRUS LOGIC ]
