CS1615/16
1. INTRODUCTION
VDD
VDD
14
V
DD(on)
V
DD(off )
Voltage
Regulator
13
V
Z
+
POR
GD
GND
-
12
Blank
3
-
I
ref
IAC
SOURCE
2
15k
OLP
OCP
ADC
+
+
V
OLP (th )
V
OCP (th)
11
-
5
V
S OURCE(th)
+
-
Peak
Control
DAC
+
-
FBSENSE
V
P k_Max (th )
-
t
VAUX
+
V
FS TA RT(th )
SGND
CTRL1
eOTP
CTRL2
4
Output
Overvoltage
8
VDD
Zero-current
Detect
I
CONNE CT
10
MUX
+
+
-
V
OV P(th )
16
-
V
ZCD(th)
VDD
FBAUX
9
V
CONNE CT(th)
-
+
I
CLA MP
3
CLAMP
Figure 1. CS1615/16 Block Diagram
A typical schematic using the CS1615/16 IC is shown on the
previous page.
Startup current is provided from a patent-pending, external, high-
voltage source-follower network. In addition to providing startup
current, this unique topology is integral in providing compatibility
with digital dimmers by ensuring V
DD
power is always available
to the IC. During normal operation, an auxiliary winding on the
flyback transformer or buck-boost inductor back-biases the
source-follower circuit and provides steady-state operating
current to the IC to improve system efficiency.
Rectified input voltage V
rect
is sensed as a current into pin IAC
and is used to control the adaptive dimmer-compatibility
algorithm and to extract the phase of the input voltage for output
dimming control. The SOURCE pin is used to provide a control
signal for the high-voltage source-follower circuit during Leading-
edge Mode and Trailing-edge Mode; it also provides the current
during startup.
The digital dual-mode controller is implemented with peak-
current mode primary-side regulation, which eliminates the need
for additional components to provide feedback from the
secondary and reduces system cost and complexity. Voltage
across a user-selected resistor is sensed through pin FBSENSE
to control the peak current of the primary-side inductor. Leading-
edge and trailing-edge blanking on pin FBSENSE prevents false
triggering. The required target LED current and average flyback
transformer and buck-boost inductor input current are set by
attaching resistors R
CTRL1
and R
CTRL2
on pins CTRL1 and
CTRL2, respectively. The controller ensures half line-cycle
averaged constant output current.
Pin FBAUX is used for zero-current detection to ensure
quasi-resonant switching of the single stage output. When an
external negative temperature coefficient (NTC) thermistor is
connected to pin eOTP, the CS1615/16 monitors the system
temperature, allowing the controller to reduce the output current
of the system. If the temperature reaches a designated high set
point, the IC is shut down and stops switching.
2
DS961F1
APEX [ CIRRUS LOGIC ]
