CS1615/16
1. INTRODUCTION
VDD
Voltage
Regulator
14
VDD
13
12
GD
VDD(on)
VDD(off)
POR
+
-
VZ
GND
Blank
OLP
3
Iref
-
+
15k
VOLP(th )
2
ADC
IAC
OCP
+
-
VOCP(th)
Peak
Control
+
-
11
FBSENSE
5
+
-
SOURCE
VSOURCE(th)
VPk_Max
(th )
DAC
-
+
VFSTART(th )
tVAUX
4
SGND
Output
Overvoltage
+
-
VOVP(th )
VDD
8
Zero-current
Detect
CTRL1
+
-
16
FBAUX
CLAMP
VZCD(th)
VDD
ICONNECT
10
9
MUX
eOTP
-
+
ICLAMP
CTRL2
VCONNECT(th)
3
Figure 1. CS1615/16 Block Diagram
A typical schematic using the CS1615/16 IC is shown on the
previous page.
The digital dual-mode controller is implemented with peak-
current mode primary-side regulation, which eliminates the need
for additional components to provide feedback from the
secondary and reduces system cost and complexity. Voltage
across a user-selected resistor is sensed through pin FBSENSE
to control the peak current of the primary-side inductor. Leading-
edge and trailing-edge blanking on pin FBSENSE prevents false
triggering. The required target LED current and average flyback
transformer and buck-boost inductor input current are set by
attaching resistors RCTRL1 and RCTRL2 on pins CTRL1 and
CTRL2, respectively. The controller ensures half line-cycle
averaged constant output current.
Startup current is provided from a patent-pending, external, high-
voltage source-follower network. In addition to providing startup
current, this unique topology is integral in providing compatibility
with digital dimmers by ensuring VDD power is always available
to the IC. During normal operation, an auxiliary winding on the
flyback transformer or buck-boost inductor back-biases the
source-follower circuit and provides steady-state operating
current to the IC to improve system efficiency.
Rectified input voltage Vrect is sensed as a current into pin IAC
and is used to control the adaptive dimmer-compatibility
algorithm and to extract the phase of the input voltage for output
dimming control. The SOURCE pin is used to provide a control
signal for the high-voltage source-follower circuit during Leading-
edge Mode and Trailing-edge Mode; it also provides the current
during startup.
Pin FBAUX is used for zero-current detection to ensure
quasi-resonant switching of the single stage output. When an
external negative temperature coefficient (NTC) thermistor is
connected to pin eOTP, the CS1615/16 monitors the system
temperature, allowing the controller to reduce the output current
of the system. If the temperature reaches a designated high set
point, the IC is shut down and stops switching.
2
DS961F1
APEX [ CIRRUS LOGIC ]
