AOZ1232-01
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help ther-
mal dissipation.
5. Decoupling capacitor C
should be connected to
VCC
VCC and AGND as close as possible.
6. Voltage divider R1 and R2 should be placed as close
as possible to FB and AGND.
7.
R
should be connected as close as possible to
TON
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance ther-
mal conduction path. Connect a large copper plane
to IN pins to help thermal dissipation.
Pin 6 (TON pin).
8. A ground plane is preferred; Pin 26 (PGND) is con-
nected to the ground plane through via.
9. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
3. Do not use thermal relief connection on the PGND
pin. Pour a maximized copper area on the PGND pin
to help thermal dissipation.
10. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
4. Input capacitors should be connected to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.
Vo
R2
R1
Rton
IN
9
30
28
SS
Cvcc
IN 10
IN 11
VCC
Vcc
Cin
27 BST
26
GND
Cb
PGND
25
PGND 12
PGND 13
PGND 14
LX
Cout
LX
Rev. 1.3 October 2012
www.aosmd.com
Page 13 of 18
AOS [ ALPHA & OMEGA SEMICONDUCTORS ]
