APW7137
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For ceramic capacitor application, the output voltage ripple
is dominated by the DVCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their good
temperature and voltage characteristics are
recommended.
L1
VOUT
D1
LX
VIN
Output Voltage Setting
VEN
The output voltage is set by a resistive divider. The exter-
nal resistive divider is connected to the output which al-
lows remote voltage sensing as shown in “Typical Appli-
cation Circuits”. A suggestion of the maximum value of
R1 is 2MW and R2 is 200kW for keeping the minimum
current that provides enough noise rejection ability through
the resistor divider. The output voltage can be calculated
as below:
Optimized APW7137 Layout
R1
R2
R1
R2
æ
ö
÷
ø
æ
ö
÷
ø
VOUT = VREF × 1+
= 1.23 1+
ç
ç
è
è
Diode Selection
To achieve the high efficiency, a Schottky diode must be
used. The current rating of the diode must meet the peak
current rating of the converter.
Layout Consideration
For all switching power supplies, the layout is an impor-
tant step in the design especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and the GND without any via holes for good input volt-
age filtering.
2. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed as
close as possible to the LX pin to minimize the noise
coupling into other circuits.
3. Since the feedback pin and network is a high imped-
ance circuit the feedback network should be routed away
from the inductor. The feedback pin and feedback net-
work should be shielded with a ground plane or trace to
minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright ã ANPEC Electronics Corp.
14
www.anpec.com.tw
Rev. A.4 - Oct., 2008