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APW7061KC-TR 参数 Datasheet PDF下载

APW7061KC-TR图片预览
型号: APW7061KC-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 同步降压PWM控制器 [Synchronous Buck PWM Controller]
分类和应用: 控制器
文件页数/大小: 17 页 / 285 K
品牌: ANPEC [ ANPEC ELECTRONICS COROPRATION ]
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APW7061  
Functional Pin Description  
VCC (Pin 1)  
COMP (Pin 3)  
This pin provides a supply voltage to the device, When This pin is the output of the error amplifier. Add an  
VCC is risingabove the threshold 4.2V, the device is external resistor and capacitor network to provide  
turned on, and conversely, when VCC drops below the loop compensation for the PWM converter (see  
the falling threshold, the device is turned off. A 1uF Application Information).  
decoupling capacitor to GND is recommended.  
Pull this pin below 0.4V will shutdown the controller,  
FB (Pin 2)  
forcing the UGATE and LGATE signals to be 0V. A  
soft start cycle will be initiated upon the release of  
this pin.  
FB pin is the inverting input of the error amplifier, and  
it receives the feedback voltage from an external  
resistive divider across the output (VOUT). The output PHASE (Pin 5)  
voltage is determined by:  
A resistor (ROCSET) is connected between this pin and  
the drain of the low-side MOSFET will determine the  
over current limit. An internally generated 250uA  
æ
ö
÷
÷
ø
ROUT  
RGND  
ç
VOUT = 0.8V ´ 1+  
ç
è
where ROUT is the resistor connected from VOUT to FB, current source will flow through this resistor, creating  
and RGND is the resistor connected from FB to GND.  
a voltage drop. This voltage will be compared with the  
voltage across the low-side MOSFET. The threshold  
of the over current limit is therefore given by :  
When theFB voltage is under 50% VREF, it will cause  
the under voltage protection, and shutdown the device.  
Remove the condition and restart the VCC voltage,  
250 mA ´ R OCSET  
ILIMIT  
=
R DS(ON)  
will enable again the device.  
GND (Pin 4)  
An over current condition will cycle the soft start  
function until the over current condition is removed.  
Because of the comparator delay time, so theon time  
of the low-side MOSFET must be longer than 800ns  
Signal ground for the IC.  
UGATE (Pin 6)  
This pin provides gate drive for the high-side MOSFET.  
BOOT (Pin 7)  
to have the over current protection work.  
This pin provides the supply voltage to the high side  
MOSFET driver. For driving logic level N-channel  
MOSEFT, a bootstrap circuit can be use to create a  
suitable driver’s supply.  
LGATE (Pin 8)  
This pin provides the gate drive signal for the low side  
MOSFET.  
Copyright ã ANPECElectronicsCorp.  
5
www.anpec.com.tw  
Rev. A.7 - Nov., 2005  
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