欢迎访问ic37.com |
会员登录 免费注册
发布采购

A7BW01ZA 参数 Datasheet PDF下载

A7BW01ZA图片预览
型号: A7BW01ZA
PDF下载: 下载PDF文件 查看货源
内容描述: 单节锂离子/锂聚合物单节锂离子/锂聚合物 [Single-cell Li-ion / Li-polymer Single-cell Li-ion / Li-polymer]
分类和应用:
文件页数/大小: 23 页 / 223 K
品牌: ANASEM [ AnaSem Hong Kong Limited ]
 浏览型号A7BW01ZA的Datasheet PDF文件第8页浏览型号A7BW01ZA的Datasheet PDF文件第9页浏览型号A7BW01ZA的Datasheet PDF文件第10页浏览型号A7BW01ZA的Datasheet PDF文件第11页浏览型号A7BW01ZA的Datasheet PDF文件第13页浏览型号A7BW01ZA的Datasheet PDF文件第14页浏览型号A7BW01ZA的Datasheet PDF文件第15页浏览型号A7BW01ZA的Datasheet PDF文件第16页  
Single-cell Li-ion / Li-polymer Battery Protection IC  
Rev. E09-06  
A7B Series  
z Over-charge detection  
When the battery voltage (VDD) under the normal condition becomes equal to or higher than the over-charge  
detection voltage (Vc) and that state is maintained during more than the over-charge detection delay time (tc),  
this IC turns off the charge control FET and stops charge. This state is called the over-charge detection condition.  
Release from the over-charge detection condition includes following three cases.  
(1) When VDD falls to Vc-VHc without load and that state is maintained during more than the delay time 2 (trel2),  
this IC turns on the charge control FET and returns to the normal condition.  
* VHc : Over-charge hysteresis voltage  
(2) When the load is installed and discharge starts, the discharge current flows through the internal parasitic  
diode of the charge control FET. Then the VM terminal voltage rises to only the Vf voltage of the internal  
parasitic diode from VSS potential. At this time, if the VM terminal voltage is higher than the discharge over-  
current detection voltage (VIdc) and VDD is equal to or less than Vc, this IC returns to the normal condition  
when this state continues more than the delay time 2 (trel2).  
(3) In case (2), if the VM terminal voltage is higher than the discharge over-current detection voltage (VIdc) and  
VDD is equal to or higher than Vc, battery is discharged until VDD becomes less than Vc, and then this IC  
returns to the normal condition when this state continues more than the delay time 2 (trel2).  
z Over-discharge detection  
When the battery voltage (VDD) under the normal condition becomes equal to or less than the over-discharge  
detection voltage (Vdc) and that state is maintained during more than the over-discharge detection delay time  
(tdc), this IC turns off the discharge control FET and stops discharge. This state is called the over-discharge  
detection condition. The over-discharge detection condition is released when the charger is connected and  
following three cases are included.  
(1) When the charger is connected and charge starts, the charge current flows through the internal parasitic  
diode of the discharge control FET. VDD is higher than Vdc and that state is maintained during more than the  
delay time 1 (trel1), this IC is released from over-discharge detection condition automatically and returns to  
the normal condition.  
(2) In case (1), if VDD is less than Vdc, this IC returns to the normal condition when VDD becomes equal to or  
higher than Vdc and this state continues more than the delay time 1 (trel1).  
(3) Although there is very little possibility, in case (1), if the VM terminal voltage is higher than the charge over-  
current detection voltage (VIc) even if the charge current flows through the internal parasitic diode of the  
discharge control FET, this IC returns to the normal condition when VDD becomes equal to or higher than  
Vdc+VHdc and this state continues more than delay time 1 (trel1).  
* VHdc = 0.4V (typical) ---- This voltage is tested in production, but is not specified.  
This IC stops all internal circuits ( Shutdown condition ) after detecting the over-discharge and reduces current  
consumption. ( Max 0.1µA, at VDD=1.8V )  
z Charge to 0V battery  
(1) 0V battery charge function  
If the voltage of charger (the voltage between VDD and VM) is larger than the 0V battery charge starting  
charger voltage (Vcha), 0V battery charge becomes possible when CO terminal outputs VDD terminal  
potential and turns on the charge control FET.  
(2) 0V battery charge inhibiting function  
If the voltage of the battery (VDD) is equal to or less than the 0V battery charge inhibiting battery voltage  
(Vinh), charge is inhibited when CO terminal outputs VM terminal potential and turns off a charge control FET.  
AnaSem Inc.  
11  
.......... Future of the analog world