Single-cell Li-ion / Li-polymer Battery Protection IC
Rev. E09-06
A7B Series
BLOCK DIAGRAM
Oscillator
Level
Shifter
Counter
VDD
CO
VM
Control Circuit
Short Detector
_
_
Over-charge
Detector
Charge
Over-current
Detector
_
DO
_
Over-discharge
Detector
Discharge
Over-current
Detector
Vss
CHIP PAD CONFIGURATION
(Unit : µm)
Chip pad layout
No.
Symbol
Descriptions
X
Y
1
2
3
4
5
DO
VM
FET gate connection for discharge control (CMOS output)
Voltage monitoring for charger negative
FET gate connection for charge control (CMOS output)
Positive power input
173.5
228.5
-1.1
428.5
-428.5
-428.5
428.5
428.5
CO
VDD
VSS
-37.5
-228.5
Negative power input
VDD
VSS
DO
VM
(0,0)
X
Chip size : 0.7mm×1.1mm
Thickness : 0.28mm±0.02mm
Pad size : 0.085mm×0.085mm
Chip base level : VDD
CO
Y
AnaSem Inc.
3
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