PRODUCT DATASHEET
AAT3169
SwitchReg
TM
High Efficiency 1X/1.5X/2X Charge Pump for White LED Applications
edges between 1 and including 16. A typical write proto-
col is a burst of EN/SET rising edges, signifying a particu-
lar address, followed by a pause with EN/SET held high
for the T
LAT
timeout period, a burst of rising edges signify-
ing data, and a T
LAT
timeout for the data registers. Once
an address is set, then multiple writes consisting of data
only (without address) to the corresponding data register
are allowed. Address 0 is the default address on the first
rising edge after the AAT3169 has been disabled. If data
is presented on the first rising edge with no prior address,
both data registers are simultaneously loaded.
The maximum current level is determined by the value
set in Register 3, the Max Current register. Three scales
are available for high operating currents with maximum
current levels of 30mA, 20mA, or 15mA. Each scale
maintains approximately 1.8dB steps between settings.
A separate mode is available for ultra-low LED current
operation. When the Max Current register (Register 3) is
set to the Low Current setting, the Low Current register
(Register 4) must be programmed. The two most sig-
nificant bits of the Low Current register control whether
or not a given bank of current sinks is enabled. The least
two significant bits of the Low Current register sets the
current level for both banks. For low current settings, the
charge pump may be enabled if required by the battery
voltage and LED forward voltage conditions, and 1X
mode quiescent current is approximately 130µA for mul-
tiple channels or 65µA for Channel 6 operation only. Both
banks of current sinks must be in the same high or low
current mode of operation.
When EN/SET is held low for an amount of time greater
than T
OFF
, the AAT3169 enters shutdown mode and draws
less than 1µA from the input. Data and Address registers
are reset to 0 during shutdown.
The 16 individual current level settings are each approx-
imately 1.8dB apart (see Table 1). Code 1 is full scale;
Code 15 is full scale attenuated by approximately 25dB;
and Code 16 is reserved as a “no current” setting.
Mean
30mA Max
30.0
29.3
27.8
25.2
22.8
20.9
18.5
16.1
13.7
10.0
9.4
7.0
4.7
3.3
1.9
0.0
Data
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mean
20mA Max
20.0
19.5
18.5
17.5
15.4
14.2
12.5
10.9
9.3
8.0
6.5
4.9
3.3
2.4
1.5
0.0
Mean
15mA Max
15.0
14.6
13.9
12.7
11.5
10.5
9.3
8.1
7.0
6.0
4.9
3.7
2.6
1.9
1.2
0.0
Table 1: Mean Table of AAT3169 Output Current.
AS
2
Cwire Serial Interface
The current sink input magnitude on the AAT3169 is con-
trolled by AnalogicTech’s Advanced Simple Serial Control
(AS
2
Cwire) serial digital input. AS
2
Cwire adds addressing
capability for multiple data registers over the Simple
Serial Control™ (S
2
Cwire™), which is only capable of
controlling a single register. The AAT3169 has four regis-
ters: Bank1, Bank2, Max Current, and Low Current.
Three addresses are used to control the two registers.
Address 0 addresses both registers simultaneously to
allow the loading of both registers with the same data
using a single write protocol. Address 1 addresses
Register 1 for D1 to D5 current level settings. Address 2
addresses Register 2 for D6 current level settings.
AS
2
Cwire relies on the number of rising edges of the EN/
SET pin to address and load the registers. AS
2
Cwire
latches data or address after the EN/SET pin has been
held high for time T
LAT
. Address or data is differentiated
by the number of EN/SET rising edges. Since the data
registers are 4 bits each, the differentiating number of
pulses is 2
4
or 16, so that Address 0 is signified by 17
rising edges, Address 1 by 18 rising edges, and Address
2 by 19 rising edges. Data is set to any number of rising
AS
2
Cwire Serial Interface Addressing
Address
0
1
2
3
4
EN/SET
Rising Edges
17
18
19
20
21
Data Register
AAT3169
1&2: D1~D6 Current
1: D1~D5 Current
2: D6 Current
3: Max Current
4: Low Current
Data
1
2
3
4
Max Current
20mA
30mA
15mA
Low Current (see Low Current Register for values)
3169.2008.03.1.3
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