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AAT3113 参数 Datasheet PDF下载

AAT3113图片预览
型号: AAT3113
PDF下载: 下载PDF文件 查看货源
内容描述: 高能效1.5x分数电荷泵为白光LED应用 [High Efficiency 1.5X Fractional Charge Pumps For White LED Applications]
分类和应用:
文件页数/大小: 14 页 / 233 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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High Efficiency 1.5X Fractional Charge
Pumps For White LED Applications
Functional Block Diagram
VIN
AAT3113/4
Soft Start
600kHz
Oscillator
Voltage
Reference
1.5X
Charge
Pump
C1+
C1-
C2+
C2-
OUT
EN/SET
S
2
Cwire
Interface
5
32x8 bit
ROM
8
Current
Mode
DAC
D1
D2
D3
D4
D5*
D6*
GND
* AAT3114 only
Functional Description
The AAT3113/4 is a high efficiency 1.5X fractional
charge pump device intended for white LED back
light applications. The fractional charge pump con-
sists of a linear regulator followed by a 1.5X charge
pump. The AAT3113/4 requires only four external
components: two 1µF ceramic capacitors for the
charge pump flying capacitors (C1 and C2), one
1µF ceramic capacitor for C
IN
, and one 0.33µF to
1µF ceramic capacitor for C
OUT
. The charge pump
output is converted into four or six constant current
outputs (D1 to D4 or D6) to drive four or six individ-
ual LEDs with a maximum of 20mA each. The cur-
rent source output magnitude is controlled by the
EN/SET serial data S
2
C interface. The interface
records rising edges of the EN/SET pin, and
decodes them into 32 individual current level set-
tings each 1dB apart (see Current Level Settings
below). Code 32 is full scale, and Code 1 is full
scale attenuated by 31dB. The modulo 32 interface
wraps states back to state 1 after the 32nd clock.
With each EN/SET pulse, the output current increas-
es by 1dB. To decrease the output current by 1dB,
31 EN/SET clock pulses are required. The counter
can be clocked at speeds up to 1Mhz, so intermedi-
ate states are not visible. The first rising edge of
EN/SET enables the IC and initially sets the output
LED current to -31dB, the lowest setting equal to
525µA. Once the final clock cycle is input for the
desired brightness level, the EN/SET pin is held high
to maintain the device output current at the pro-
grammed level. The device is disabled 500µs after
the EN/SET pin transitions to a logic low state.
3113.2004.07.1.4
7