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AAT2847IML-QG-T1 参数 Datasheet PDF下载

AAT2847IML-QG-T1图片预览
型号: AAT2847IML-QG-T1
PDF下载: 下载PDF文件 查看货源
内容描述: 四通道背光驱动器,带有双LDO [Four-Channel Backlight Driver with Dual LDOs]
分类和应用: 驱动器
文件页数/大小: 20 页 / 382 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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AAT2847  
Four-Channel Backlight Driver with Dual LDOs  
identify/target a particular address followed by  
EN/SET being held logic high for the TLAT timeout  
period to latch the address value in the address  
register, then another burst of rising edges that sig-  
nify data with the accompanying TLAT timeout peri-  
od to latch the data value in the data register. Once  
an address is set, then multiple writes to the corre-  
30.0  
25.0  
20.0  
15.0  
10.0  
5.0  
Address 0  
Address 4  
sponding data register are allowed without having  
to write to the address for every value change in  
the data register. When EN/SET is held low longer  
0.0  
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16  
1
2
3
4
than TOFF (500µs), the AAT2847 enters shutdown  
mode operation and draws less than 1µA from the  
input supply voltage. Data and address registers  
are cleared (0 for the address register and 1 for the  
data registers) in shutdown mode operation.  
Code  
Figure 1: LED Current Control Profile.  
2
AS Cwire Serial Interface  
2
AS Cwire Serial Interface Addressing  
Each white LED channel input on the AAT2847  
2
(D1-D4) is controlled by AnalogicTech's AS Cwire  
EN/SET  
2
serial digital interface. The AS Cwire interface uses  
Address Edges  
Addressed Register  
D1-D4 Current Control  
Current Scale  
Low Current Control  
Independent LED Control  
the number of rising edges on the EN/SET pin to  
address and load the LED configuration registers.  
0
3
4
5
17  
20  
21  
22  
2
AS Cwire latches data or addresses after the  
EN/SET pin has been held logic high for longer  
than TLAT (500µs). Addresses and data are differ-  
entiated by the number of EN/SET rising edges.  
Since the data registers are 4 bits each, the differ-  
2
Table 1: AS Cwire Serial Interface Addressing.  
4
entiating number of pulses is 2 or 16, so that  
Address 0 is signified by 17 rising edges, Address  
1 by 18 rising edges, Address 2 by 19 rising edges,  
and so on. Data is set to any number of rising  
edges between, and including, 1 to 16.  
Current Operation (Address 0)  
Use Address 0 to program all four LED channels  
with the current values in Table 2. All four white  
LED channels are programmed to the same cur-  
rent level by writing to Address 0 followed by any  
Data between, and including, 1 to 16.  
A typical write protocol consist of the following:  
First a burst of EN/SET rising edges that  
Address  
THI  
Data  
TLAT  
TLO  
TLAT  
EN/SET  
1
2
19  
0
20  
1
2 . . .  
n 16  
Address  
DATA3  
DATA0  
3
1
1
n
2
Figure 2: AS Cwire Serial Interface Timing.  
12  
2847.2007.09.1.0