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AAT2688IFK-AI-T1 参数 Datasheet PDF下载

AAT2688IFK-AI-T1图片预览
型号: AAT2688IFK-AI-T1
PDF下载: 下载PDF文件 查看货源
内容描述: 对于12V适配器系统4.5A PMIC解决方案有2个输出高性能降压型转换器 [4.5A PMIC Solution for 12V Adapter Systems with 2-Output High Performance Step-Down Converters]
分类和应用: 转换器集成电源管理电路
文件页数/大小: 20 页 / 3687 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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PRODUCT DATASHEET  
AAT2688  
TM  
SystemPower  
4.5A PMIC Solution for 12V Adapter Systems with 2-Output High Performance Step-Down Converters  
down mode, an internal 1.5kΩ resistor is connected  
between VOUT and GND. This is intended to discharge COUT  
when the LDO regulator is disabled. The internal 1.5kΩ  
has no adverse effect on device turn-on time.  
highly recommended. A larger value of CIN with respect  
to COUT will affect a slower CIN decay rate during shut-  
down, thus preventing VOUT from exceeding VIN. In appli-  
cations where there is a greater danger of VOUT exceeding  
VIN for extended periods of time, it is recommended to  
place a Schottky diode across VIN to VOUT (connecting the  
cathode to VIN and anode to VOUT). The Schottky diode  
forward voltage should be less than 0.45V.  
Channel 2 Short-Circuit Protection  
The AAT2688 LDO contains an internal short-circuit pro-  
tection circuit that will trigger when the output load cur-  
rent exceeds the internal threshold limit. Under short-  
circuit conditions, the output of the LDO regulator will be  
current limited until the short-circuit condition is removed  
from the output or LDO regulator package power dissi-  
pation exceeds the device thermal limit.  
Thermal Calculations  
There are three types of losses associated with the  
AAT2688 step-down converter: switching losses, con-  
duction losses, and quiescent current losses. Conduction  
losses are associated with the RDS(ON) characteristics of  
the power output switching devices. Switching losses are  
dominated by the gate charge of the power output  
switching devices. At full load, assuming continuous con-  
duction mode (CCM), a simplified form of the synchro-  
nous step-down converter and LDO losses is given by:  
Channel 2 Thermal Protection  
The AAT2688 LDO has an internal thermal protection  
circuit which will turn on when the device die tempera-  
ture exceeds 135°C. The internal thermal protection  
circuit will actively turn off the LDO regulator output pass  
device to prevent the possibility of over temperature  
damage. The LDO regulator output will remain in a shut-  
down state until the internal die temperature falls back  
below the 135°C trip point. The combination and interac-  
tion between the short circuit and thermal protection  
systems allows the LDO regulator to withstand indefinite  
short-circuit conditions without sustaining permanent  
damage.  
2
IOUT1 · (RDS(ON)H · VOUT1 + RDS(ON)L · [VIN1 - VOUT1])  
PTOTAL  
=
VIN1  
+ (tSW · FS · IOUT1 + IQ1) · VIN1 + (VIN2 - VOUT2) · IOUT2  
IQ1 and IQ2 are the step-down converter and LDO quies-  
cent currents respectively. The term tSW is used to esti-  
mate the full load step-down converter switching losses.  
For a synchronous Step-Down converter, the power dis-  
sipation occurs in the internal high side MOSFET during  
the on time and the external low side MOSFET during the  
off time. When the internal high side switch is off, the  
power dissipates on the external low side switch. The  
total package losses for AAT2688 reduce to the following  
equation:  
Channel 2 No-Load Stability  
The AAT2688 is designed to maintain output voltage  
regulation and stability under operational no load condi-  
tions. This is an important characteristic for applications  
where the output current may drop to zero.  
PTOTAL = IOUT12 · RDS(ON)H · D + (tSW · FS · IOUT1 + IQ1) · VIN + (VIN2 - VOUT2) · IOUT2  
Channel 2 Reverse Output-to-Input  
Voltage Conditions and Protection  
VOUT  
VIN  
Where: D =  
is the duty cycle.  
Under normal operating conditions, a parasitic diode  
exists between the output and input of the LDO regula-  
tor. The input voltage should always remain greater than  
the output load voltage, maintaining a reverse bias on  
the internal parasitic diode. Conditions where VOUT might  
exceed VIN should be avoided since this would forward  
bias the internal parasitic diode and allow excessive cur-  
rent flow into the VOUT pin, possibly damaging the LDO  
regulator. In applications where there is a possibility of  
VOUT exceeding VIN for brief amounts of time during nor-  
mal operation, the use of a larger value CIN capacitor is  
Since RDS(ON), quiescent current, and switching losses all  
vary with input voltage, the total losses should be inves-  
tigated over the complete input voltage range.  
Given the total losses, the maximum junction tempera-  
ture can be derived from the θJA for the TQFN45-24  
package, which is 33°C/W.  
TJ(MAX) = PTOTAL · θJA + TAMB  
w w w . a n a l o g i c t e c h . c o m  
14  
2688.2008.06.1.0  
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