AAT2556
Battery Charger and Step-Down
Converter for Portable Applications
3. The feedback pin (Pin 1) should be separate
from any power trace and connect as closely as
possible to the load point. Sensing along a high-
current load trace will degrade DC load regula-
tion. Feedback resistors should be placed as
closely as possible to the FB pin (Pin 1) to mini-
mize the length of the high impedance feedback
trace. If possible, they should also be placed
away from the LX (switching node) and inductor
to improve noise immunity.
4. The resistance of the trace from the load return
to PGND (Pin 10) and GND (Pin 2) should be
kept to a minimum. This will help to minimize any
error in DC regulation due to differences in the
potential of the internal signal ground and the
power ground.
Printed Circuit Board Layout
Considerations
For the best results, it is recommended to physi-
cally place the battery pack as close as possible to
the AAT2556 BAT pin. To minimize voltage drops
on the PCB, keep the high current carrying traces
adequately wide. Refer to the AAT2556 evaluation
board for a good layout example (see Figures 6
and 7). The following guidelines should be used to
help ensure a proper layout.
1. The input capacitors (C1, C3) should connect
as closely as possible to ADP (Pin 9) and VIN
(Pin 12).
2. C4 and L1 should be connected as closely as
possible. The connection of L1 to the LX pin
should be as short as possible. Do not make the
node small by using narrow trace. The trace
should be kept wide, direct, and short.
5. A high density, small footprint layout can be
achieved using an inexpensive, miniature, non-
shielded, high DCR inductor.
Figure 6: AAT2556 Evaluation Board
Top Side Layout.
Figure 7: AAT2556 Evaluation Board
Bottom Side Layout.
22
2556.2006.05.1.0
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
