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AAT2504_08 参数 Datasheet PDF下载

AAT2504_08图片预览
型号: AAT2504_08
PDF下载: 下载PDF文件 查看货源
内容描述: 可调节的3通道稳压器 [Adjustable 3-Channel Regulator]
分类和应用: 稳压器
文件页数/大小: 21 页 / 771 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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PRODUCT DATASHEET
AAT2504178
SystemPower
TM
Pin Descriptions
Pin #
1
2
3
4
Adjustable 3-Channel Regulator
Symbol
FBB
ENA
ENB
MODE/SYNC
Function
Feedback input pin for LDOB. This pin is used to regulate the output of LDOB to the desired value via an
external resistor divider.
Enable pin for LDOA. Active high.
Enable pin for LDOB. Active high.
PWM operation and oscillator synchronization pin. Connect to ground for PWM/Light Load operation
and optimized efficiency throughout the load range. Connect high for low noise PWM operation under
all operating conditions. When connected to an external clock, the internal oscillator is disabled and the
step-down converter is synchronized to an external clock applied to this pin (PWM only).
Feedback input pin for the step-down converter. This pin is used to see the output of the converter to
regulate to the desired value via an external resistor divider.
Ground connection pin.
Main power ground return pin for the step-down converter. Connect to the output and input capacitor
return.
Connect inductor to this pin. Switching node internally connected to the drain of both high- and low-side
MOSFETs.
Input supply voltage for the converter. Must be closely decoupled.
Not connected.
Bias supply. Supply power for the internal circuitry. Connect to input power via low pass
lter with de-
coupling to AGND.
Enable for the step-down converter. Active high.
Power-OK pin with open drain output. It is pulled low when the OUTA pin is outside the regulation win-
dow. Place a pull-up resistor between POK and OUTA.
Feedback input pin for LDOA. This pin is used to regulate the output of LDOA to the desired value via an
external resistor divider.
LDOA output pin; should be closely decoupled with a low-ESR ceramic capacitor.
Input voltage pin for linear regulator A; should be closely decoupled.
Input voltage pin for linear regulator B; should be closely decoupled.
LDOB output pin; should be closely decoupled with a low-ESR ceramic capacitor.
Exposed paddle; connect to ground directly beneath the package.
5
6
7
8, 9
10
11, 12
13
14
15
16
17
18
19
20
EP
FB
AGND
PGND
LX
VP
N/C
VIN
EN
POK
FBA
OUTA
VLDOA
VLDOB
OUTB
Pin Configuration
QFN34-20
(Top View)
OUTA
VLDOA
VLDOB
OUTB
20
19
18
17
FBB
ENA
ENB
MODE/SYNC
FB
AGND
1
2
3
4
5
6
10
9
7
8
16
15
14
13
12
11
FBA
POK
EN
VIN
N/C
N/C
2
www.analogictech.com
VP
LX
LX
PGND
2504.2008.02.1.2