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AAT2500IWP-IP-T1 参数 Datasheet PDF下载

AAT2500IWP-IP-T1图片预览
型号: AAT2500IWP-IP-T1
PDF下载: 下载PDF文件 查看货源
内容描述: 1MHz的降压转换器/ LDO稳压器 [1MHz Step-Down Converter/LDO Regulator]
分类和应用: 转换器稳压器电源电路电源管理电路
文件页数/大小: 26 页 / 862 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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AAT2500  
1MHz Step-Down Converter/LDO Regulator  
Figure 3: AAT2500 Evaluation Board Top Side.  
Figure 4: AAT2500 Evaluation Board  
Bottom Side.  
In applications where the input power source lead  
inductance cannot be reduced to a level that does  
not affect the converter performance, a high ESR  
tantalum or aluminum electrolytic should be placed  
in parallel with the low ESR, ESL bypass ceramic.  
This dampens the high Q network and stabilizes  
the system.  
Once the average inductor current increases to the  
DC load level, the output voltage recovers. The  
above equation establishes a limit on the minimum  
value for the output capacitor with respect to load  
transients.  
The internal voltage loop compensation also limits  
the minimum output capacitor value to 4.7µF. This  
is due to its effect on the loop crossover frequency  
(bandwidth), phase margin, and gain margin.  
Increased output capacitance will reduce the  
crossover frequency with greater phase margin.  
Output Capacitor  
The output capacitor limits the output ripple and  
provides holdup during large load transitions. A  
4.7µF to 10µF X5R or X7R ceramic capacitor typi-  
cally provides sufficient bulk capacitance to stabi-  
lize the output during large load transitions and has  
the ESR and ESL characteristics necessary for low  
output ripple.  
The maximum output capacitor RMS ripple current  
is given by:  
1
VOUT · (VIN(MAX) - VOUT)  
IRMS(MAX)  
=
·
L · F · VIN(MAX)  
2 · 3  
The output voltage droop due to a load transient is  
dominated by the capacitance of the ceramic out-  
put capacitor. During a step increase in load cur-  
rent, the ceramic output capacitor alone supplies  
the load current until the loop responds. Within two  
or three switching cycles, the loop responds and  
the inductor current increases to match the load  
current demand. The relationship of the output volt-  
age droop during the three switching cycles to the  
output capacitance can be estimated by:  
Dissipation due to the RMS current in the ceramic  
output capacitor ESR is typically minimal, resulting in  
less than a few degrees rise in hot-spot temperature.  
Adjustable Output Resistor Selection  
For applications requiring an adjustable output volt-  
age, the 0.6V version can be externally pro-  
grammed. Resistors R1 and R2 of Figure 5 program  
the output to regulate at a voltage higher than 0.6V.  
To limit the bias current required for the external  
feedback resistor string while maintaining good  
noise immunity, the minimum suggested value for  
3
·
VDROOP FS  
ΔILOAD  
COUT  
=
·
2500.2006.05.1.16  
17  
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