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AAT1232ITP-T1 参数 Datasheet PDF下载

AAT1232ITP-T1图片预览
型号: AAT1232ITP-T1
PDF下载: 下载PDF文件 查看货源
内容描述: 24V 100毫安升压转换器 [24V 100mA Step-Up Converter]
分类和应用: 转换器稳压器开关式稳压器或控制器电源电路开关式控制器升压转换器
文件页数/大小: 17 页 / 438 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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AAT1232  
24V 100mA Step-Up Converter  
THI  
TOFF  
TLO  
TLAT  
EN/SET  
1
2
n-1  
n 16  
0
n-1  
Data Reg  
0
Figure 3: S2Cwire Timing Diagram to Program the Output Voltage.  
S2Cwire Output Voltage Programming  
1. Minimize the distance from capacitor C1 and  
C2 negative terminal to the PGND pins. This is  
especially true with output capacitor C2, which  
conducts high ripple current from the output  
diode back to the PGND pins.  
2. Place the feedback resistors close to the output  
terminals. Route the output pin directly to resis-  
tor R1 to maintain good output regulation. R3  
should be routed close to the output GND pin.  
3. Minimize the distance between L1 to D1 and  
switching pin SW; minimize the size of the PCB  
area connected to the SW pin.  
4. Maintain a ground plane and connect to the IC  
RTN pin(s) as well as the GND terminals of C1  
and C2.  
5. Consider additional PCB area on D1 cathode  
to maximize heatsinking capability. This may  
be necessary when using a diode with a high  
thermal resistance.  
The AAT1232 is programmed through the S2Cwire  
interface according to Table 2. The rising clock  
edges received through the EN/SET pin determine  
the feedback reference and output voltage set-  
point. Upon power up with the SEL pin low and  
prior to S2Cwire programming, the default feed-  
back reference voltage is set to 0.6V.  
PCB Layout Guidelines  
Boost converter performance can be adversely  
affected by poor layout. Possible impact includes  
high input and output voltage ripple, poor EMI per-  
formance, and reduced operating efficiency. Every  
attempt should be made to optimize the layout in  
order to minimize parasitic PCB effects (stray  
resistance, capacitance, inductance) and EMI cou-  
pling from the high frequency SW node.  
6. When using the TDFN34-16 package, connect  
paddle to SW pin or leave floating. Do not con-  
nect to RTN/GND conductors.  
A suggested PCB layout for the AAT1232 boost  
converter is shown in Figures 4 and 5. The follow-  
ing PCB layout guidelines should be considered:  
Figure 4: AAT1232 Evaluation Board  
Top Side.  
Figure 5: AAT1232 Evaluation Board  
Bottom Side.  
14  
1232.2006.12.1.3  
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