AAT1231/1231-1
Step-Up DC/DC Converters for
White LED Backlight Applications
Assume R3 = 12kΩ and VOUT(MAX) = 24V. Selecting
1% resistor for high accuracy, this results in R2 =
226kΩ (rounded to the nearest standard value).
The minimum OVP threshold can be calculated:
ensure DC current and negligible flicker in the LED
string(s).
The waveform in Figure 3 shows the output voltage
and LED current at cold temperature with a six
series white LED string and VOVP = 19.4V. As
shown, the output voltage rises as a result of the
increased VFLED which triggers the OVP constant
voltage operation. Self heating of the LEDs trig-
gers a smooth transition back to constant current
control.
⎛
⎝
R2
R3
⎞
+ 1
·
VOUT(OVP_MIN) = VOVP(MIN)
= 21.8V
⎠
To avoid OVP detection and subsequent reduction
in the programmed output current (see following
section), the maximum operating voltage should
not exceed the minimum OVP set point.
OVP Constant Voltage Operation
Cold Temperature Applied
Self-Recovery
VOUT
(5V/div)
VOUT(MAX) < VOUT(OVP_MIN)
ILED
(10mA/div)
ΔILED
In some cases, this may disallow configurations
with high LED forward voltage (VFLED) and/or
greater than five series white LEDs. VFLED unit-to-
unit tolerance can be as high as +15% of nominal
for white LED devices.
Time (1s/div)
OVP Constant Voltage Operation
Figure 3: Over-Voltage Protection
Constant Voltage Operation
(6 White LEDs; ILED = 13mA;
R2 = 182kΩ; R3 = 12kΩ).
Under closed loop constant current conditions, the
output voltage is determined by the operating cur-
rent, LED forward voltage characteristics (VFLED),
quantity of series connected LEDs (N), and the
feedback pin voltage (VFB).
While OVP is active, the maximum LED current
programming error (ΔILED) is proportional to voltage
error across an individual LED (ΔVFLED).
VOUT = VFB + N · VFLED
(N · VFLED(MAX) - VOUT(OVP MIN) - VFB)
_
When the rising OVP threshold is exceeded,
switching is stopped and the output voltage
decays. Switching automatically restarts when the
output drops below the lower OVP hysteresis volt-
age (100mV typical) and, as a result, the output
voltage increases. The cycle repeats, maintaining
an average DC output voltage proportional to the
average of the rising and falling OVP levels (multi-
plied by the resistor divider scaling factor). High
operating frequency and small output voltage ripple
ΔVFLED
=
N
To minimize the ΔILED error, the minimum OVP volt-
age (VOUT(OVP_MIN)) may be increased, yielding a
corresponding increase in the maximum OVP volt-
age (VOUT(OVP_MAX)). Measurements should confirm
that the maximum switching node voltage
(VSW(MAX)) is less than 28V under worst-case oper-
ating conditions.
12
1231.2007.01.1.2
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
