AAT1230/1230-1
18V 100mA Step-Up Converter
Minimum 6.3V rated ceramic capacitors are required
at the input. Ceramic capacitors sized as small as
0603 are available which meet these requirements.
FB1 and FB2 pins is not required. See Table 1 for
static output voltages with SEL = High or SEL =
Low. SEL = High corresponds to VOUT(1) and SEL =
Low corresponds to VOUT(2)
.
The AAT1230/1230-1 provides excellent load tran-
sient response, but large capacitance tantalum or
solid-electrolytic capacitors may be desired. These
can replace (or be used in parallel with) ceramic
capacitors. Both tantalum and OSCON-type capaci-
tors are suitable due to their low ESR and excellent
temperature stability (although they exhibit much
higher ESR than MLC capacitors). Aluminum-elec-
trolytic types are less suitable due to their high ESR
characteristics and temperature drift. Unlike MLC
capacitors, these types are polarized and proper ori-
entation on input and output pins is required. 30% to
70% voltage derating is recommended for tantalum
capacitors.
Option 2: Dynamic Voltage Control Using SEL Pin
The output may be dynamically adjusted between
two output voltages by toggling the SEL logic pin.
Output voltages VOUT(1) and VOUT(2) correspond to
the two output references, FB1 and FB2. Pulling
the SEL logic pin high activates VOUT(1), while
pulling the SEL logic pin low activates VOUT(2)
.
The minimum output voltage must be greater than
the specified maximum input voltage plus margin to
maintain proper operation of the AAT1230/1230-1
boost converter. In addition, the ratio of output volt-
ages VOUT(2)/VOUT(1) is always less than 2.0, corre-
sponding to a 2X (maximum) programmable range.
Setting the Output Voltage
See Table 1 for dynamic output voltage settings
when toggling between SEL = High and SEL = Low.
SEL = High corresponds to VOUT(1) and SEL = Low
The output voltage may be programmed through a
resistor divider network located from the output to
FB1 and FB2 pins to ground. Pulling the SEL pin
high activates the FB1 pin which maintains a 1.2V
reference voltage, while the FB2 reference is dis-
abled. Pulling the SEL pin low activates the FB2
pin which maintains a 0.6V reference, while the
FB1 reference is disabled.
corresponds to VOUT(2)
.
R3 = 4.99kΩ
VOUT(1)
VOUT(2)
(SEL = High) (SEL = Low) R1 (kΩ) R2 (kΩ)
10.0V
12.0V
15.0V
16.0V
18.0V
–
–
36.5
44.2
57.6
61.9
69.8
78.7
95.3
121
127
143
75
0
0
–
The AAT1230/1230-1 output voltage can be pro-
grammed by one of three methods. First, the out-
put voltage can be static by pulling the SEL logic
pin either high or low. Second, the output voltage
can be dynamically adjusted between two pre-set
levels within a 2X operating range by toggling the
SEL logic pin. Third, the output can be dynamical-
ly adjusted to any of 16 preset levels within a 2X
operating range using the integrated S2Cwire sin-
gle wire interface via the EN/SET pin.
–
0
–
0
–
0
10.0V
12.0V
15.0V
16.0V
18.0V
10.0V
10.0V
10.0V
10.0V
12.0V
12.0V
12.0V
15.0V
0
–
0
–
0
–
0
–
0
12.0V
15.0V
16.0V
18.0V
15.0V
16.0V
18.0V
18.0V
3.32
1.65
1.24
0.562
3.01
2.49
1.65
3.32
76.8
76.8
78.7
90.9
93.1
93.1
115
Option 1: Static Output Voltage
A static output voltage can be configured by pulling
the SEL either high or low. SEL pin high activates the
FB1 reference pin to 1.2V (nominal). Alternatively,
the SEL pin is pulled low to activate the FB2 refer-
ence at 0.6V (nominal). Table 1 provides details of
resistor values for common output voltages from 10V
to 18V for SEL = High and SEL = Low options.
Table 1: SEL Pin Voltage Control Resistor
Values (1% resistor tolerance).
In the static configuration, the FB1 pin should be
directly connected to FB2. The resistor between
1230.2006.10.1.4
13
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