PRODUCT DATASHEET
AAT1149B
TM
SwitchReg
2.2MHz FastTransient 400mA Step-Down Converter
For the condition where the step-down converter is in
dropout at 100% duty cycle, the total device dissipation
reduces to:
Layout
The suggested PCB layout for the AAT1149B is shown in
Figures 1 and 2. The following guidelines should be used
to help ensure a proper layout.
PTOTAL = IO2 · RDS(ON)H + IQ · VIN
1. The input capacitor (C2) should connect as closely as
possible to IN (Pin 4) and PGND (Pin 3).
2. C1 and L1 should be connected as closely as possi-
ble. The connection of L1 to the LX pin should be as
short as possible.
Since RDS(ON), quiescent current, and switching losses all
vary with input voltage, the total losses should be inves-
tigated over the complete input voltage range.
3. The feedback trace or FB pin (Pin 1) should be sepa-
rate from any power trace and connect as closely as
possible to the load point. Sensing along a high-
current load trace will degrade DC load regulation.
4. The resistance of the trace from the load return to
the PGND (Pin 3) should be kept to a minimum. This
will help to minimize any error in DC regulation due
to differences in the potential of the internal signal
ground and the power ground.
Given the total losses, the maximum junction tempera-
ture can be derived from the θJA for the WLCSP-8 pack-
age which is 284°C/W.
TJ(MAX) = PTOTAL · ΘJA + TAMB
WLCSP Package Light Sensitivity
The electrical performance of the WLCSP package can be
adversely affected by exposing the device to certain light
sources such as direct sunlight or a halogen lamp whose
wavelengths are red and infra-reds. However, fluores-
cent lighting has very little effect on the electrical perfor-
mance of the WLCSP package.
5. The pad on the PCB for the WLCSP-5 package should
use NSMD (non-solder mask defined) configuration
due to its tighter control on the copper etch process.
A pad thickness of less than 1oz is recommended to
achieve higher stand-off.
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1149B.2008.07.1.0
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
