AAT1142
800mA Voltage-Scaling Step-Down Converter
4
3
8
SCL
SDA
1
2
5
6
7
9
MSB
A6
LSB
R/W
A5
A4
A3
A2
A1
A0
ACK
Slave Address
Figure 4: I2C Address Bit Map;
7-bit Slave Address (A6-A0), 1-bit Read/Write (R/W), 1-bit Acknowledge (ACK).
I2C Data Bit Map
I2C Software Protocol
Figure 5 illustrates the data bit format. The 8-bit
data is always sent with the most significant bit first
and is valid when SCL is high. The ACK bit is set
low by the AAT1142 slave device to acknowledge
receipt of the data.
An I2C master / slave data transfer, detailing the
address and data bits, is shown in Figure 6. The
programming sequence is as follows:
1. Send a start condition
2. Send the I2C slave address with the R/W bit
set low
I2C Acknowledge Bit
3. Wait for acknowledge within the clock cycle
4. Send the data bits
5. Wait for acknowledge within the clock cycle
6. Send the stop condition
The ACK bit is the ninth bit in the address and data
byte. The master must first release the SDA line, and
then the slave will pull the SDA line low. The
AAT1142 sends a low bit to acknowledge receipt of
each byte. This occurs during the ninth clock cycle
of Address and Data transfers (see Figures 5 and 6).
4
3
8
SCL
SDA
1
2
5
6
7
9
MSB
D7
LSB
D0
D6
D5
D4
D3
D2
D1
ACK
Data
Figure 5: I2C Data Bit Map;
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
SCL
1
2
0
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Slave Address
R/W
0
ACK
0/1
Data
Stop
Start
ACK
0/1
0
1
0
1
0
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
7-bit address (0x14)
Figure 6: I2C SCL, SDA Transfer Protocol Example;
7-bit Slave Address (A6-A0 = 0x14), 1-bit Read/Write (R/W = 0), 1-bit Acknowledge (ACK),
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
14
1142.2006.07.1.0
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
