AAT1123
1MHz Step-Down Converter
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain
measurements can also result.
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation limits the
minimum output capacitor value to 22µF. This is
due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
The maximum output capacitor RMS ripple current
is given by:
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
1
VOUT · (VIN(MAX) - VOUT)
IRMS(MAX)
=
·
L · F · VIN(MAX)
2 · 3
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic should be placed
in parallel with the low ESR, ESL bypass ceramic.
This dampens the high Q network and stabilizes
the system.
Dissipation due to the RMS current in the ceramic
output capacitor ESR is typically minimal, resulting in
less than a few degrees rise in hot-spot temperature.
Adjustable Output Resistor Selection
For applications requiring an adjustable output volt-
age, the 0.6V version can be externally pro-
grammed. Resistors R1 and R2 of Figure 5 program
the output to regulate at a voltage higher than 0.6V.
To limit the bias current required for the external
feedback resistor string while maintaining good
noise immunity, the minimum suggested value for
R2 is 59kΩ. Although a larger value will further
reduce quiescent current, it will also increase the
impedance of the feedback node, making it more
sensitive to external noise and interference. Table 2
summarizes the resistor values for various output
voltages with R2 set to either 59kΩ for good noise
immunity or 221kΩ for reduced no load input current.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
22µF X5R or X7R ceramic capacitor provides suffi-
cient bulk capacitance to stabilize the output during
large load transitions and has the ESR and ESL
characteristics necessary for low output ripple.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent, the ceramic output capacitor alone supplies
the load current until the loop responds. Within two
or three switching cycles, the loop responds and
the inductor current increases to match the load
current demand. The relationship of the output volt-
age droop during the three switching cycles to the
output capacitance can be estimated by:
V
V
1.5V
0.6V
⎛
⎝
⎞
⎛
⎝
⎞
- 1 ·
R1 =
OUT -1
·
R2 =
59kΩ = 88.5kΩ
⎠
⎠
REF
The adjustable version of the AAT1123, combined
with an external feedforward capacitor (C4 in
Figure 1), delivers enhanced transient response for
extreme pulsed load applications. The addition of
the feedforward capacitor typically requires a larg-
er output capacitor C1 for stability.
3
·
VDROOP FS
ΔILOAD
COUT
=
·
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
12
1123.2007.02.1.6
ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
