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AS29LV800T-80TC 参数 Datasheet PDF下载

AS29LV800T-80TC图片预览
型号: AS29LV800T-80TC
PDF下载: 下载PDF文件 查看货源
内容描述: 3V 1M × 8 / 512K × 16的CMOS闪存EEPROM [3V 1M】8/512K】16 CMOS Flash EEPROM]
分类和应用: 闪存内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 24 页 / 394 K
品牌: ANADIGICS [ ANADIGICS, INC ]
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AS29LV800  
October 2000  
®
Operating modes  
Mode  
CE  
L
OE  
L
WE  
A0  
L
A1  
A6  
L
A9  
RESET DQ  
ID read MFR code  
ID read device code  
Read  
H
L
V
V
H
H
H
H
H
H
H
H
Code  
Code  
ID  
ID  
L
L
H
H
L
L
L
L
H
A0  
X
A1  
X
A6  
X
A9  
X
D
OUT  
Standby  
H
L
X
H
H
X
High Z  
High Z  
Output disable  
Write  
H
X
X
X
X
L
L
A0  
L
A1  
H
A6  
L
A9  
D
X
X
IN  
Enable sector protect  
Sector unprotect  
L
V
V
Pulse/L  
Pulse/L  
V
V
ID  
ID  
ID  
ID  
L
L
H
H
Temporary sector  
unprotect  
X
X
X
X
X
X
X
V
X
ID  
Verify sector protect  
L
L
X
L
L
X
H
H
X
L
L
X
H
H
X
L
V
V
X
H
H
L
Code  
ID  
ID  
Verify sector unprotect  
Hardware Reset  
H
X
Code  
High Z  
L = Low (<VIL) = logic 0; H = High (>VIH) = logic 1; VID = 10.0 ± 1.0V; X = don’t care.  
In ×16 mode, BYTE = VIH. In ×8 mode, BYTE = VIL with DQ8-DQ14 in high Z and DQ15 = A-1.  
Verification of sector protect/unprotect during A9 = VID.  
Mode definitions  
Item  
Description  
Selected by A9 = V (9.5V–10.5V), CE = OE = A1 = A6 = L, enabling outputs.  
ID  
ID MFR code,  
device code  
When A0 is low (V ) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash  
IL  
products. When A0 is high (V ), D  
represents the device code for the AS29LV800.  
IH  
OUT  
Selected with CE = OE = L, WE = H. Data is valid in t  
time after addresses are stable, t after CE is  
CE  
ACC  
Read mode  
Standby  
low and t after OE is low.  
OE  
Selected with CE = H. Part is powered down, and I reduced to <1.0 µA when CE = V ± 0.3V =  
CC  
CC  
RESET. If activated during an automated on-chip algorithm, the device completes the operation before  
entering standby.  
Output disable Part remains powered up; but outputs disabled with OE pulled high.  
Selected with CE = WE = L, OE = H. Accomplish all Flash erasure and programming through the  
command register. Contents of command register serve as inputs to the internal state machine. Address  
Write  
latching occurs on the falling edge of WE or CE, whichever occurs later. Data latching occurs on the rising  
edge WE or CE, whichever occurs first. Filters on WE prevent spurious noise events from appearing as  
write commands.  
Hardware protection circuitry implemented with external programming equipment causes the device to  
disable program and erase operations for specified sectors. For in-system sector protection, refer to Sector  
protect algorithm on page14.  
Enable  
sector protect  
Disables sector protection for all sectors using external programming equipment. All sectors must be  
protected prior to sector unprotection. For in-system sector unprotection, refer to Sector unprotect  
algorithm on page 14.  
Sector  
unprotect  
DID 11-40002-A. 10/19/00  
ALLIANCE SEMICONDUCTOR  
3