ARA2004
LOGIC PROGRAMMING
Programming Instructions
The programming word is set through an 8 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last.
The enable line must be low for the duration of the
data entry, then set high to latch the shift register.
The rising edge of the clock pulse shifts each data
value into the register.
Table 6: Programming Word
DATA BIT
Value
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
P7
P6
P5
P4
P3
P2
P1
P0
Table 7: Data Description
FUNCTION
VALUE
(1 = on, 0 = bypass)
N/A
P7
P6
P5
P4
P3
P2
P1
P0
N/A
32 dB Attenuator Bit
16 dB Attenuator Bit
8 dB Attenuator Bit
4 dB Attenuator Bit
2 dB Attenuator Bit
1 dB Attenuator Bit
DATA
D7: MSB
D6
D4
D3
D1
D0: LSB
CLOCK
ENABLE
OR
ENABLE
Figure 17: Serial Data Input Timing
Data Sheet - Rev 2.1
07/2005
12
ANADIGICS [ ANADIGICS, INC ]
