AIT1042
LOGIC PROGRAMMING
Thisꢀsectionꢀdescribesꢀtheꢀprogrammingꢀinterfaceꢀforꢀ
theꢀANADIGICSꢀAIT1042ꢀintegratedꢀtuner.ꢀꢀ
Table 7: Address Select Decoding
(VDD = +5 V)
Pin 25 VAS Voltage
Address (Hex)
PHYSICAL INTERFACE
1.1ꢀtoꢀ1.7ꢀV
0ꢀtoꢀ0.8ꢀV
C0
C2
C4
C6
Hostsꢀ thatꢀ conformꢀ toꢀ theꢀ I2C-Busꢀ Specificationꢀ
standardꢀcanꢀbeꢀusedꢀtoꢀprogramꢀtheꢀAIT1042.ꢀTheꢀ
physicalꢀlayerꢀinterfaceꢀisꢀaꢀtwo-wireꢀserialꢀbusꢀusingꢀ
CLOCKꢀandꢀDATAꢀdigitalꢀlines.ꢀꢀTheꢀnominalꢀbitꢀrateꢀofꢀ
theꢀinterfaceꢀisꢀ400ꢀkbits/sec.ꢀꢀForꢀdataꢀtransmission,ꢀ
theꢀ signalꢀ onꢀ theꢀ DATAꢀ lineꢀ mustꢀ beꢀ stableꢀ whenꢀ
theꢀCLOCKꢀsignalꢀisꢀhigh,ꢀandꢀtheꢀstateꢀofꢀtheꢀdataꢀ
mustꢀchangeꢀonlyꢀwhileꢀtheꢀCLOCKꢀsignalꢀisꢀlow.ꢀꢀAꢀ
logicꢀlevelꢀtransitionꢀonꢀtheꢀDATAꢀlineꢀduringꢀaꢀhighꢀ
CLOCKꢀsignalꢀindicatesꢀtheꢀbeginningꢀorꢀendꢀofꢀaꢀdataꢀ
transmission,ꢀasꢀspecifiedꢀinꢀtheꢀfollowingꢀsectionsꢀandꢀ
shownꢀinꢀFigure 4.
2.1ꢀtoꢀ2.7ꢀV
4.2ꢀVꢀtoꢀVDD
Sending Data
Ifꢀtheꢀreceivedꢀaddressꢀbyteꢀmatchesꢀtheꢀaddressꢀsetꢀ
byꢀtheꢀVASꢀvoltage,ꢀtheꢀAIT1042ꢀwillꢀacknowledgeꢀbyꢀ
pullingꢀtheꢀdataꢀlowꢀbeforeꢀtheꢀ9thꢀpositiveꢀclockꢀedge.ꢀ
Theꢀhostꢀcanꢀthenꢀbeginꢀsendingꢀprogrammingꢀdataꢀinꢀ
8-bitꢀwords.ꢀꢀTheꢀMSBꢀisꢀsentꢀfirstꢀandꢀtheꢀLSBꢀlast.ꢀ
TheꢀAIT1042ꢀ acknowledgesꢀ receiptꢀ byꢀ pullingꢀ theꢀ
DATAꢀlineꢀlowꢀforꢀoneꢀclockꢀpulseꢀafterꢀeachꢀreceivedꢀ
byte.ꢀꢀTheꢀdataꢀacknowledgementꢀtellsꢀtheꢀhostꢀitꢀmayꢀ
sendꢀtheꢀnextꢀdataꢀword.ꢀꢀEachꢀgroupꢀofꢀthreeꢀdataꢀ
wordsꢀ(24ꢀbitsꢀtotal)ꢀisꢀusedꢀtoꢀprogramꢀoneꢀofꢀsevenꢀ
registersꢀdescribedꢀbelow.
CLOCK
Start
Indicator:
DATA
Completing Data Transmission
CLOCK
Stop
Indicator:
Afterꢀsendingꢀtheꢀfinalꢀdataꢀword,ꢀtheꢀhostꢀsendsꢀaꢀStop
indicatorꢀtoꢀmarkꢀtheꢀendꢀofꢀdataꢀtransmission.ꢀAꢀStopꢀisꢀ
indicatedꢀbyꢀaꢀlow-to-highꢀtransitionꢀofꢀtheꢀDATAꢀsignalꢀ
whileꢀtheꢀCLOCKꢀsignalꢀisꢀheldꢀhigh.ꢀꢀAfterꢀreceivingꢀ
the Stopꢀindicator,ꢀtheꢀAIT1042ꢀceasesꢀtoꢀsendꢀfurtherꢀ
acknowledgementsꢀandꢀbeginsꢀtoꢀmonitorꢀtheꢀCLOCKꢀ
andꢀDATAꢀsignalsꢀforꢀtheꢀnextꢀStartꢀindicator.
DATA
Figure 4: Transmission Indicators
Note: The Stop indicator does not directly control when
the programming data is latched or takes effect; the
data takes effect immediately following the receipt of
each three-word block of data, which represents a
complete 24-bit divider register.
ADDRESSING THE AIT1042
TheꢀAIT1042ꢀmonitorsꢀtheꢀCLOCKꢀand DATAꢀsignalsꢀ
forꢀaꢀStartꢀindicationꢀfromꢀtheꢀhost.ꢀꢀAꢀStartꢀisꢀindicatedꢀ
byꢀaꢀhigh-to-lowꢀtransitionꢀofꢀtheꢀDATAꢀsignalꢀwhileꢀtheꢀ
CLOCKꢀsignalꢀisꢀhigh.ꢀꢀImmediatelyꢀfollowingꢀtheꢀStart
indicator,ꢀtheꢀhostꢀsendsꢀanꢀ8-bitꢀaddressꢀwordꢀtoꢀtheꢀ
AIT1042.ꢀꢀAddressꢀwordsꢀdependꢀonꢀtheꢀvoltageꢀonꢀ
Pinꢀ25ꢀ(VAS),ꢀasꢀshownꢀinꢀTable 7ꢀ(theꢀMSBꢀisꢀsentꢀ
first,ꢀLSBꢀlast).ꢀOnceꢀtheꢀAIT1042ꢀhasꢀrecognizedꢀtheꢀ
Startꢀindicatorꢀandꢀaꢀvalidꢀaddressꢀword,ꢀitꢀsendsꢀanꢀ
addressꢀacknowledgementꢀtoꢀtheꢀhostꢀbyꢀpullingꢀtheꢀ
DATAꢀlineꢀlowꢀforꢀoneꢀclockꢀpulse.ꢀꢀTheꢀhostꢀcanꢀthenꢀ
Re-sending Data
If,ꢀforꢀsomeꢀreason,ꢀtheꢀdataꢀtransmissionꢀfailsꢀorꢀisꢀ
interrupted,ꢀtheꢀhostꢀcanꢀresendꢀtheꢀdata.ꢀꢀToꢀresendꢀ
data,ꢀaꢀnewꢀStartꢀindicatorꢀandꢀaddressꢀwordꢀmustꢀbeꢀ
sentꢀpriorꢀtoꢀanyꢀdataꢀwords.
beginꢀtoꢀsendꢀdataꢀtoꢀprogramꢀtheꢀAIT1042.
PRELIMINARY DATA SHEET - Rev 1.0
02/2009
11
ANADIGICS [ ANADIGICS, INC ]
