ACD2202
Table 6: Digital Interface Specifications
(T
A
= 25
°C,
V
DD
= +5 VDC, ref. Figure 4)
PARAMETER
Logic High Input: V
H
(pins 10, 11, 12)
Logic Low Input: V
L
(pins 10, 11, 12)
Logic Input Current Consumption
(pins 10, 11, 12)
Data to Clock Set Up Time: t
CS
Data to Clock Hold Time: t
CH
Clock Pulse Width High: t
CWH
Clock Pulse Width Low: t
CWL
Clock to Load Enable Setup Time: t
ES
Load Enable Pulse Width: t
EW
Rise Time: t
R
Fall Time: t
F
MIN
2.0
-
-
50
10
50
50
50
50
-
-
TYP
-
-
-
-
-
-
-
-
-
10
10
MAX
-
0.8
0.01
-
-
-
-
-
-
-
-
UNIT
V
V
mA
ns
ns
ns
ns
ns
ns
ns
ns
DATA
CLOCK
N20: MSB
(R20: MSB)
N19
(R19)
N10
R10
N9
(R9)
(R8)
(C2)
C2
C1: LSB
(C1: LSB)
t
CWL
LE
OR
LE
t
CS
t
CH
t
CWH
t
ES
t
EW
Figure 4: Serial Data Input Timing
Data Sheet - Rev 2.1
12/2003
7
ANADIGICS [ ANADIGICS, INC ]
