Table 9. A.C. Electrical Characteristics Over the Operating Range8,11
-1/I-7
-10/I-10
-15/I-15
-25/I-25
Symbol
Parameter
Unit
Min Max Min Max Min Max Min Max
Input5 to non-registered output
Input5 to output enable6
Input5 to output disable6
Clock to Output
tPD
tOE
tOD
tCO1
7.5
7.5
7.5
5.5
10
10
10
6
15
15
15
8
25
25
25
15
ns
ns
ns
ns
Clock to comb. output delay via
internal registered feedback
Clock to Feedback
tCO2
10
12
4
17
5
35
9
ns
tCF
tSC
tHC
tCL, tCH
tCP
fMAX1
fMAX2
fMAX3
tAW
3.5
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
Input5 or Feedback Setup to Clock
Input5 Hold After Clock
3
0
3
8.5
142
117
166
7.5
5
0
4
11
111
909
125
10
8
0
6
15
0
13
Clock Low Time, Click High Time8
Min Clock Period Ext(tSC+tCO1)
Internal Feedback (1tSC+tCF)12
External Feedback (1/tCP)12
No Feedback (1/tCL+tCH)12
Asynchronous Reset Pulse Width
Input5 to Asynchronous Reset
Asynch. Reset recovery time
18
30
76.9
62.5
83.3
15
41.6
33.3
38.4
25
tAP
7.5
7.5
10
10
15
15
25
25
tAR
Power-on Reset Time for registers
in Clear State
tRESET
5
5
5
5
ns
Switching Waveforms
Inputs, I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
8. Test conditions assume: signal transition times of 3ns or less from the
Notes
10% and 90% points, timing reference levels of 1.5V (unless otherwise
1. Minimum DC input is -0.5V, however inputs may undershoot to -2.0V for
periods less than 20ns.
specified).
9. Test one output at a time for a duration of less than 1sec.
10. ICC for a typical application: This parameter is tested with the device
programmed as an 8-bit Counter.
2. VI and VO are not specified for program/verify operation.
3. Test points for Clock and VCC in t
R, tF are referenced at 10% and 90%
levels.
11. PEEL™ Device test loads are specified in Section 6 of this Data Book.
12. Parameters are not 100% tested. Specifications are based on initial
characterization and are tested after any design or process modifica-
tion which may affect operational frequency.
4. I/O pins are 0V and 3V.
5. “Input” refers to an Input pin signal.
6. tOE is measured from input transition to VREF ± 0.1V, tOD is measured from
input transition to VOH -0.1V or VOL +0.1V; VREF =V
L see test loads in
13. Available only for 22CV10A -15/I-15/-25/I-25 grades.
Section 5 of the Data Book.
7. Capacitances are tested on a sample basis.
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Dec 16, 2004
8/10
ANACHIP [ ANACHIP CORP ]
