AS5043
Data Sheet – Analog Readback Mode
13 Analog Readback Mode
Non-volatile programming (OTP) uses on-chip zener diodes, which become permanently low resistive when subjected to
a specified reverse current.
The quality of the programming process depends on the amount of current that is applied during the programming
process (up to 130mA). This current must be provided by an external voltage source. If this voltage source cannot
provide adequate power, the zener diodes may not be programmed properly.
In order to verify the quality of the programmed bits, an analog level can be read for each zener diode, giving an
indication whether this particular bit was properly programmed or not.
To put the AS5043 in Analog Readback Mode, a digital sequence must be applied to pins CSn, PROG and CLK as
shown in Figure 15. The digital level for this pin depends on the supply configuration (3.3V or 5V; see section 1, page 5).
The second rising edge on CSn (OutpEN) changes pin PROG to a digital output and the log. high signal at pin PROG
must be removed to avoid collision of outputs (grey area in Figure 15).
The following falling slope of CSn changes pin PROG to an analog output, providing a reference voltage Vref, that must be
saved as a reference for the calculation of the subsequent programmed and unprogrammed OTP bits.
Following this step, each rising slope of CLK outputs one bit of data in the reverse order as during programming.
(see Figure 15: Output Range OR0 and -1 , ClampMdEn, RefExtEn, FB_IntEn, Z0…Z9, ccw)
During analog readback, the capacitor at pin PROG (see Figure 12) should be removed to allow a fast readout rate.
The measured analog voltage for each bit must be subtracted from the previously measured Vref, and the resulting value
gives an indication on the quality of the programmed bit: a reading of <100mV indicates a properly programmed bit and a
reading of >1V indicates a properly unprogrammed bit.
A reading between 100mV and 1V indicates a faulty bit, which may result in an undefined digital value, when the OTP is
read at power-up.
Following the 16th clock (after reading bit “ccw”), the chip must be reset by disconnecting the power supply.
Figure 15: Analog OTP Register Read
Power-on-
Reset;
ProgEN
O utpEN
Analog Readback Data at PROG
cycle supply
CSn
Vref
Vprogram m ed
Internal
test bit
digital
PROG
CLK
Clamp RefExt
Z9 ccw
16
Z5
Vunprogram m ed
Z6
Z7
Z8
O R0 O R1
M dEN
EN
Prog ch anges to Output
1
tLoadProg
CLKAread
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