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AS1528_1 参数 Datasheet PDF下载

AS1528_1图片预览
型号: AS1528_1
PDF下载: 下载PDF文件 查看货源
内容描述: 微功耗, 10位,下150ksps , ADC ,单端或差分 [Micro-Power, 10-Bit, 150ksps, ADC, Single Ended or Differential]
分类和应用:
文件页数/大小: 21 页 / 621 K
品牌: AMSCO [ AMS(艾迈斯) ]
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AS1528/AS1529  
Datasheet - Electrical Characteristics  
Timing Characteristics  
VDD = +2.7 to +5.25V, VREF = +2.5V, 4.7µF Capacitor at REF; fSCLK = 8MHz (50% Duty Cycle); AIN- = GND (AS1528)  
TAMB = TMIN to TMAX (unless otherwise specified). Typical Values at TAMB = +25ºC.  
Table 5. Timing Characteristics  
Parameter  
Symbol  
tCH  
Conditions  
Min  
38  
Typ  
Max  
Units  
ns  
SCLK Pulse Width High  
SCLK Pulse Width Low  
tCL  
38  
ns  
CLOAD = 30pF (see Figure 3, Figure 4,  
Figure 18 on page 11, Figure 19 on  
page 11)  
SCLK Falling-to-DOUT  
Transition  
tDOT  
tDOD  
28  
200  
3.3  
60  
500  
3.7  
ns  
ns  
CLOAD = 30pF (see Figure 3, Figure 4,  
Figure 18 on page 11, Figure 19 on  
page 11)  
SCLK Rising-to-DOUT1  
Disable  
100  
30  
CLOAD = 30pF (see Figure 3, Figure 4,  
Figure 18 on page 11, Figure 19 on  
page 11)  
CNVST Falling-to-MSB Vlid  
CNVST Pulse Width  
tCONV  
tCSW  
µs  
ns  
1. Guaranteed by Design and Characterisation.  
Figure 3. DOUT Enable/Disable Time Load Circuits  
DOUT  
VDD  
6kΩ  
6kΩ  
CLOAD  
DOUT  
GND  
GND  
CLOAD  
High-impedance to VOH, VOL to VOH, and VOH to High-impedance  
GND  
Figure 4. Detailed Serial Interface Timing Diagram  
CNVST  
tCH  
tCSW  
tCL  
SCLK  
DOUT  
tDOT  
tDOD  
High Z  
www.austriamicrosystems.com  
Revision 1.02  
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