Data Sheet AS1500/1/2/3
AS1502 / AS1503 – SPECIFICATIONS
VDD = 3V±10% or 5V±10%, V
A
= VDD, V
B
= 0V, –40°C
≤
T
A
≤
+125°C unless otherwise noted.
ELECTRICAL CHARACTERISTICS – 50k and 100k VERSIONS
Parameter
Symbol
Conditions
DC CHARACTERISTICS RHEOSTAT MODE
T
A
= 25°C, VDD = 5V, AS1502, Version: 50kΩ
Nominal Resistance
13
R
AB
T
A
= 25°C, VDD = 5V, AS1503, Version: 100kΩ
14
Resistance Tempco
∆R
AB
/∆T V
AB
= VDD, Wiper = No Connect
Wiper Resistance
R
W
VDD = 5V
Resistor Differential NL
15
R-DNL R
WB
, VDD = 5V, V
A
= No Connect
Resistor Integral NL
R-INL
R
WB
, VDD = 5V, V
A
= No Connect
DC CHARACTERISTICS POTENTIOMETER DIVIDER
Resolution
N
VDD = 5.5V T
A
= 25°C
Integral Nonlinearity
INL
VDD = 2.7V T
A
= 25°C
VDD = 5.5V T
A
= 25°C
Differential Nonlinearity
DNL
VDD = 2.7V T
A
= 25°C
Voltage Divider Tempco
∆V
W
/∆T Code = 80
H
Full-Scale Error
V
WFSE
Code = FF
H
, VDD = 5.5V
Zero-Scale Error
V
WZSE
Code = 00
H
, VDD = 5.5V
RESISTOR TERMINALS
Voltage Range
16
V
A, B, W
17
Ax, Bx
Capacitance
C
A, B
f = 1MHz, Measured to GND, Code = 80
H
Capacitance Wx
C
W
f = 1MHz, Measured to GND, Code = 80
H
DIGITAL INPUTS AND OUTPUTS
Input Logic High
V
IH
VDD = 5V
Input Logic Low
V
IL
VDD = 5V
Input Logic High
V
IH
VDD = 3V
Input Logic Low
V
IL
VDD = 3V
Input Current
I
IH
, I
IL
V
IN
= 5V or 0V, VDD = 5V
Input Capacitance
C
IL
POWER SUPPLIES
Power Supply Range
VDD
Supply Current (CMOS)
IDD
V
IH
= VDD or V
IL
= 0V, VDD = 5.5V
18
Supply Current (TTL)
IDD
V
IH
= 2.4V or 0.8V, VDD = 5.5V
Power Dissipation
P
DISS
V
IH
= VDD or V
IL
= 0V, VDD = 5.5V
(CMOS)
19
AS1502, Version: 50kΩ
Power Supply Suppression
VDD = 5V + 0.5V
P
PSSR
AS1503, Version:
sine wave @ 1kHz
Ratio
100kΩ
DYNAMIC CHARACTERISTICS
20
BW_50k R
WB
= 50kΩ, VDD = 5V
Bandwidth –3dB
Bandwidth –3dB
BW_100k R
WB
= 100kΩ, VDD = 5V
Total Harmonic Distortion
THD
W
V
A
= 1V
RMS
+ 2V
DC
, V
B
= 2V
DC
, f = 1kHz
R
WB
= 50kΩ, V
A
= VDD, V
B
= 0V, ±1% Error
t
S
_50k
Band
V
W
Settling Time
R
WB
= 100kΩ, V
A
= VDD, V
B
= 0V, ±1% Error
t
S
_100k
Band
e
NWB
_50k R
WB
= 50kΩ, f = 1kHz
Resistor Noise Voltage
e
NWB
_100
R
WB
= 100kΩ, f = 1kHz
k
Table 4: Electrical Characteristics – 50k and 100k Versions
Min
40
80
20
–1
–2
–4
–4
–1
–1
–1
0
0
Typ
12
50
100
500
100
±1/4
±1/2
8
±1
±1
±1/4
±1/4
15
–0.25
0.1
15
80
Max
60
120
200
+1
+2
+4
+4
+1
+1
0
1
VDD
Unit
kΩ
kΩ
ppm/°C
Ω
LSB
LSB
Bits
LSB
LSB
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
V
V
V
V
µA
pF
V
µA
mA
µW
dB
dB
kHz
kHz
%
µs
µs
nV/
√
Hz
nV/
√
Hz
2.4
0.8
2.1
0.6
±1
5
2.7
0.1
0.9
-43
-48
220
110
0.003
9
18
20
29
5.5
1
4
27.5
tbd.
tbd.
Typicals represent average readings at 25°C and VDD = 5V.
Wiper is not connected. I
AB
= 70µA for the 50kΩ version and 35µA for the 100kΩ version.
14
All Tempcos are guaranteed by design and not subject to production test.
15
Terminal A is not connected. I
W
= 70µA for the 50kΩ version and 35µA for the 100kΩ version.
16
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
17
All capacitances are guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5V
bias on the measured terminal. The remaining resistor terminals are left open circuit.
18
Worst-case supply current consumed when input logic level at 2.4V, standard characteristic of CMOS logic.
19
P
DI SS
is calculated from (IDD×VDD). CMOS logic level inputs result in minimum power dissipation.
20
All dynamic characteristics are guaranteed by design and not subject to production test. All dynamic characteristics use VDD=5V.
12
13
Revision 1.0, Oct 2004
Page 4 of 8
AMSCO [ AUSTRIAMICROSYSTEMS AG ]
