AS1374
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
1
2
3
AS1374
4
5
6
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
2
3
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Pin Name
OUT 2
VDD
Description
Input Supply
OUT 1
EN 2
EN 1
4
5
6
Enable 2. Pull this pin to logic low to disable Regulated Output 2 voltage.
Enable 1. Pull this pin to logic low to disable Regulated Output 1 voltage.
GND
Revision 1.8
Regulated Output Voltage 2. Bypass this pin with a capacitor to GND. See
Application
Information
for capacitor selection.
Application
Information
for capacitor selection.
lv
2 - 18
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id