AS1358/AS1359
Datasheet - Detailed Description
Current Limit
The AS1358/AS1359 include a current limiting circuitry to monitor and control the P-channel MOSFET pass transis-
tor’s gate voltage, thus limiting the device output current to 270mA (AS1358) and 510mA (AS1359).
Note: See Table 4 on page 4 for the recommended min and max current limits. The output can be shorted to ground
indefinitely without causing damage to the device.
Thermal Protection
Integrated thermal protection circuitry limits total power dissipation in the AS1358/AS1359. When the junction temper-
ature (TJ) exceeds +160ºC, the thermal sensor signals the shutdown logic, turning off the P-channel MOSFET pass
transistor and allowing the device to cool down. The thermal sensor turns the pass transistor on again after the
device’s junction temperature drops by 10ºC, resulting in a pulsed output during continuous thermal-overload condi-
tions.
Note: Thermal protection is designed to protect the devices in the event of fault conditions. For continuous operation,
do not exceed the absolute maximum junction temperature rating of +150ºC.
Operating Region and Power Dissipation
The AS1358/AS1359 maximum power dissipation is dependant on the thermal resistance of the case and PCB, the
temperature difference between the die junction and TAMB, and airflow rate.
Power dissipation across the device is calculated as:
PD = IOUT (VIN - VOUT)
The maximum power dissipation is calculated:
PDMAX = (TJ - TAMB)/(θJC + θCA)
(EQ 1)
(EQ 2)
Where:
TJ - TAMB is the temperature difference between the AS1358/AS1359 die junction and the surrounding air;
θJC is the thermal resistance of the package;
θCA is the thermal resistance through the PC board/copper traces/other materials to the surrounding air.
Note: Pin GND of the AS1358/AS1359 provides the electrical connection to system ground and also serves as a heat
sink. Connect pin GND to the system ground using a large pad or ground plane.
Noise Reduction
The AS1358/AS1359 noise bypass circuitry dramatically reduces output noise, exhibiting 9µVRMS of output voltage
noise with CBYPASS = 0.01µF and COUT = 1µF. Use an external 0.01µF bypass capacitor between pin BYPASS and pin
OUT (see Figure 1 on page 1).
Note: Startup time is minimized by internal power-on circuitry which pre-charges CBYPASS.
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