AS1341
Datasheet - Detailed Description
8 Detailed Description
The AS1341 step-down converter was specifically designed for battery-powered portable devices, including laptop
computers, PDAs, and MP3/DVD/CD players. The advanced current-limited control scheme provides high-efficiency
over a wide range of output loads. The highly-efficient operation (up to 100% duty cycle) allows extremely low dropout
voltage, increasing the usable supply voltage range. In no-load conditions the AS1341 draws only 12µA; in shutdown
mode it draws only 0.8µA to further reduce power consumption and extend battery life.
The AS1341 features an integrated 20V switching MOSFET, internal current sensing, and a high switching frequency,
for minimal PCB space and external component requirements.
Figure 21. AS1341 - Block Diagram - 5V fixed Output Voltage
3
–
+
+
–
POK
–
+
RPULL
L1
4
5
LX
8
IN
CIN
+
OUT
AS1341
COUT
1
Q
R
FB
7
SHDNN
+
–
D1
S
6
Current Limit
Control
ILIMIT
–
+
Maximum On-
Time Delay
+
–
100mV
+
VSET
1.25V
Minimum Off-
Time Delay
–
2
GND
Current-Limit Control
The AS1341 uses a proprietary current-limiting control scheme with operation up to 100% duty cycle. The DC-DC con-
verter pulses as needed to maintain regulation, resulting in a variable switching frequency that increases with the load.
This eliminates the high-supply currents associated with conventional constant-frequency pulse-width-modulation
(PWM) controllers that unnecessarily switch the MOSFET.
When the output voltage is too low, the error comparator sets a flip-flop, which turns on the internal P-channel MOS-
FET and begins a switching cycle. The inductor current ramps up linearly, storing energy in a magnetic field while
charging the output capacitor and servicing the load (see Figure 19 on page 7).
The MOSFET turns off when the peak current limit is reached, or when the maximum on-time of 10µs is exceeded and
the output voltage is in regulation. If the output is out of regulation and the peak current is never reached, the MOSFET
remains on, allowing a duty cycle up to 100%. This feature ensures the lowest possible dropout voltage.
Once the MOSFET turns off, the flip-flop resets, the inductor current is pulled through D1 (see Figure 21), and the cur-
rent through the inductor ramps back down, transferring the stored energy to the output capacitor and load. The MOS-
FET remains off until the 0.4µs minimum off-time expires, and the output voltage goes out of regulation.
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