AS1333
Data Sheet
Internal Synchronous Rectifier
To reduce the rectifier forward voltage drop and the associated power loss, the AS1333 uses an internal NFET as a
synchronous rectifier. The big advantage of a synchronous rectification is the higher efficiency in a condition where the
output voltage is low compared to the voltage drop across an ordinary rectifier diode. During the inductor current down
slope in the second part of each cycle the synchronous rectifier is turned on. Before the next cycle the synchronous
rectifier is turned off.
There is no need for an external diode because the NFET is conducting through its intrinsic body diode during the
transient intervals before it turns on.
Shutdown Mode
If EN is set to high (>1.2V) the AS1333 is in normal operation mode. During power-up and when the power supply is
less than 2.7V minimum operating voltage, the chip should be turned off by setting EN low. In shutdown mode the
following blocks of the AS1333 are turned off, PFET switch, NFET synchronous rectifier, reference voltage source,
control and bias circuitry. The AS1333 is designed for compact portable applications, such as mobile phones where the
system controller controls operation mode for maximizing battery life and requirements for small package size
outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry.
Note: Setting the EN digital pin low (<0.5V) places the AS1333 in a 0.01µA (typ.) shutdown mode.
Thermal Overload Protection
To prevent the AS1333 from short-term misuse and overload conditions the chip includes a thermal overload
protection. To block the normal operation mode the device is turning the PFET and the NFET off in PWM mode as
soon as the junction temperature exceeds 150°C. To resume the normal operation the temperature has to drop below
125°C.
Note: Continuing operation in thermal overload conditions may damage the device and is considered bad practice.
Current Limiting For Protection
If in the PWM mode the cycle-by-cycle current limit of 1200mA (max.) is reached the current limit feature takes place
and protect the device and the external components. A timed current limiting mode is working when a load pulls the
output voltage down to approximately 0.375V. In this timed current limit mode the inductor current is forced to ramp
down to a safe value. This is achived by turning off the internal PFET switch and delaying the start of the next cycle for
3.5us. The synchronous rectifier is also turned off in the timed current limit mode.
The advantage of the timed current limit mode is to prevent the device from the loss of the current control.
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