AS1329
Data Sheet - Application Information
PCB Layout Guidelines
The high-speed operation of the AS1329 requires proper layout for optimum performance. Figure 21 shows the recom-
mended component layout.
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
A large ground pin copper area will help to lower the device temperature.
A multi-layer board with a separate ground plane is recommended.
Traces carrying large currents should be direct.
Trace area at pin FB should be as small as is practical.
The lead-length to the battery should be as short as is practical.
Figure 21. Recommended Single-Layer Component Placement
Optional
6
5
4
1
2
3
VIN
SW
GND
FB
AS1329
VIN
VOUT
R2
R1
CIN
SHDNN
SHDNN
COUT
VOUT
www.austriamicrosystems.com
Revision 1.01
13 - 17
AMSCO [ AMS(艾迈斯) ]
