AS1326
Data Sheet - Application Information
The input filter capacitor reduces peak currents drawn from the input source and also reduces input switching noise.
The input voltage source impedance determines the required value of the input capacitor. When operating directly from
one or two NiMh cells placed close to the AS1326A/AS1326B, use a single 33µF low-ESR input filter capacitor.
Note: With higher impedance batteries, such as alkaline and Li+, a higher value input capacitor may improve effi-
ciency.
The output filter capacitor reduces output ripple voltage and provides the load with transient peak currents when nec-
essary. For the output, a 100µF, low-equivalent series-resistance (ESR) capacitor is recommended for most applica-
tions.
Low-ESR tantalum capacitors offer a good trade-off between price and performance. Do not exceed the ripple current
ratings of tantalum capacitors.
Note: Aluminum electrolytic capacitors should not be used as their high ESR typically results in higher output ripple
voltage.
Additional External Components
Two ceramic bypass capacitors are required for proper device operation (see Figure 20 on page 11):
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Bypass pin REF to GND with a 10nF ceramic capacitor.
Bypass pin OUT to GND with a 330nF ceramic capacitor.
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A 10Ω resistor is required between pin OUT and pin POUT (see Figure 25 on page 14).
Note: External components should be placed as close to its respective pins as possible, within 5mm (0.2”).
Layout Considerations
High switching-frequencies and large peak currents of the AS1326A/AS1326B make PC board layout a critical part of
design. Poor design may cause excessive EMI and ground bounce, both of which can cause instability or regulation
errors by corrupting the voltage and current feedback signals.
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Power components such as the inductor, converter IC, filter capacitors, and output diode should be placed as close
together as possible, and their traces should be kept short, direct, and wide.
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Keep the voltage feedback network very close to the device, within 5mm (0.2”) of the pin.
Do as many vias as possible on the exposed pad (for thermal performance) to the ground plane
Keep noisy traces, such as those from the pin LX, away from the voltage feedback network and guarded from
them using grounded copper traces.
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