AS1153/55
Data Sheet - Applications
9 Applications
Table 5. Function Table
Input
Output
INx+
INx-
OUTx
VID ≥ +100mV
VID ≤ +100mV
H
L
AS1153/55 – Open, undriven short, or undriven
100Ω parallel termination
H
AS1157/58 – Open or undriven short
Figure 19. Typical Application Circuit
+3.3V
+3.3V
0.001µF
0.1µF
0.001µF
0.1µF
LVDS
Signals
LVTTL/LVCMOS
Data Outputs
LVTTL/LVCMOS
Data Inputs
Rx
Tx
107Ω
AS1158
Single LVDS Receiver
AS1152
100Ω Shielded Twisted Cable or Microstrip PC Board Traces
Power-Supply Bypassing
To bypass VCC, use high-frequency surface-mount ceramic 0.1µF and 0.001µF capacitors in parallel as close to the
device as possible, with the smaller valued capacitor closest to pin VCC.
Differential Traces
Input trace characteristics can adversely affect the performance of the AS1155/58 and AS1153/57.
ꢀ
Use controlled-impedance PC board traces to match the cable characteristic impedance. The termination resistor
must also be matched to this characteristic impedance.
ꢀ
ꢀ
Eliminate reflections and ensure that noise couples as common mode by running differential traces close together.
Reduce skew by using matched trace lengths. Tight skew control is required to minimize emissions and proper
data recovery of the devices.
ꢀ
Route each channel’s differential signals very close to each other for optimal cancellation of their respective exter-
nal magnetic fields. Use a constant distance between the differential traces to avoid irregularities in differential
impedance.
ꢀ
ꢀ
Avoid 90° turns (use two 45° turns).
Minimize the number of vias to further prevent impedance irregularities.
Cables and Connectors
Supported transmission media include printed circuit board traces, backplanes, and cables.
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