AS1106, AS1107
Data Sheet
- D e t a i l e d
Description
8 Detailed Description
AS1106 vs. AS1107
The AS1106 and AS1107 are identical except for two features:
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The AS1107 segment drivers are slew-rate limited to reduce electromagnetic interference (EMI).
The AS1107 serial interface is fully SPI compatible (programmable for AS1106).
Serial-Addressing Format
Programming the AS1106/AS1107 is done by writing to the device’s internal registers (see Digit- and Control-Registers
The data is shifted into the internal 16-bit register with the rising edge of the CLK signal. With the rising edge of the
LOAD/CSN signal the data is latched into a digit- or control-register. The LOAD/CSN signal must go high after the 16th
rising clock edge.
The LOAD/CSN signal can also come later but this must happen just before the next rising edge of CLK, otherwise the
data will be lost. The contents of the internal shift register are applied 16.5 clock cycles later to pin DOUT. The data is
clocked out at the falling edge of CLK.
The first 4 bits (D15:D12) are “don't care”, bits D11:D8 contain the register address, and bits D7:D0 contain the data.
The first bit is D15, the most significant bit (MSB). The exact timing is shown in Figure 12.
Table 6. 16-Bit Serial Data Format
D15
X
D14
X
D13
X
D12
X
D11
D10
D9
D8
D7
Register Address (see Table 7) MSB
D6
D5
D4
D3
Data
D2
D1
D0
LSB
Initial Power-Up
On initial power-up, the AS1106/AS1107 registers are reset to their default values, the display is blanked, and the
device goes into shutdown mode. At this time, all registers should be programmed for normal operation.
Note:
The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control
Register (see page 12) is set to the minimum values.
Figure 12. Interface Timing
LOAD/
CSN
t
CSH
t
CSS
t
CP
t
CL
t
CH
t
LDCK
t
CSW
CLK
t
DS
t
DH
DIN
D15
D14
D1
D0
t
DO
DOUT
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