AS3525-A/-B C22O22
Data Sheet, Confidential
Table 86 Setting the PLL output frequency
Input divider NR.
NR = 16 * R4 + 8*R3 + 4*R2 + 2*R1 + R0
Feedback divider NF:
NF = 2 * (128*F7 + 64*F6 + 32*F5 + 16*F4 + 8*F3 + 4*F2 + 2*F1 + F0)
Output divider NO:
Output divider setting
NO (output divider value)
Not allowed
1
2
4
OD0=0, OD1=0
OD0=1, OD1=0
OD0=0, OD1=1
OD0=1, OD1=1
The PLL output frequency is calculated with following formula
NF
Output frequency
Comparison frequency
VCO frequency
f
f
f
out
ref
=
=
=
⋅ fin
NR ⋅ NO
f
in
NR
NF
NR
vco
⋅ fin
Following constraints must be followed for the comparison and output frequency:
2MHz ≤ fref ≤ 8MHz
200MHz ≤ fVCO ≤ 400MHz
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