8
7
6
5
4
3
2
1
0
T = +25°C
A
V
CC
AMS81 _L/M
AMS811
AMS81 _R/S/T
RESET
R1
GND
1
10
100
1000
RESET COMPARATOR OVERDRIVE , V - V (mV)
TH
CC
Figure 1. Maximum Transient Duration without Causing a
Reset Pulse vs. Comparator Overdrive
Figure 2. RESET Valid to V
= Ground Circuit
CC
Ensuring a Valid RESET Output
Down to V = 0V
__________ Applications Information
CC
falls below 1V, the AMS811 RESET output
Negative-Going V
CC
Transients
When V
CC
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the AMS811/
AMS812 are relatively immune to short duration nega-
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS-logic inputs con-
nected to the RESET output can drift to undetermined
voltages. This presents no problem in most applica-
tions, since most µP and other circuitry is inoperative
tive-going V
transients (glitches).
CC
Figure 1 shows typical transient durations vs. reset
comparator overdrive, for which the AMS811/AMS812
do not generate a reset pulse. This graph was generat-
with V
below 1V. However, in applications where the
CC
RESET output must be valid down to 0V, adding a pull-
down resistor to the RESET pin will cause any stray
leakage currents to flow to ground, holding RESET low
(Figure 2). R1’s value is not critical; 100kΩ is large
enough not to load RESET and small enough to pull
RESET to ground.
ed using a negative-going pulse applied to V , start-
CC
ing above the actual reset threshold and ending below
it by the magnitude indicated (reset comparator over-
drive). The graph indicates the typical maximum pulse
width a negative-going V
transient may have without
CC
causing a reset pulse to be issued. As the magnitude
of the transient increases (goes farther below the reset
threshold), the maximum allowable pulse width
A 100kΩ pull-up resistor to V
is also recommended
for the AMS812 if RESET is required to remain valid for
< 1V.
CC
V
CC
decreases. Typically, a V
transient that goes 125mV
CC
below the reset threshold and lasts 40µs or less
(AMS81_L/M) or 20µs or less (AMS81_T/S/R) will not
cause a reset pulse to be issued. A 0.1µF capacitor
mounted as close as possible to V
tional transient immunity.
provides addi-
CC
Advanced Monolithic Systems http://www.ams-semitech.com