AMS73CAG01808RA
Mode Register MR3
The Mode Register MR3 controls Multi Purpose Registers (MPR). The Mode Register 3 is written by assert-
ing low on CS, RAS, CAS, WE, high on BA1 and BA0, and low on BA2 while controlling the states of
address pins according to the table below.
Address Field
BA
2
BA
1
1
BA
1
0
A13
A
12
A
11
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A0
0*1
MPR
0*1
MPR Loc
Mode Register 3
MPR Address
A1 A0
MPR Operation
A2
BA1
BA0
MRS mode
MR0
MPR location
Predefined pattern*2
MPR
0
0
1
1
0
1
0
1
0
0
Normal operation*3
Dataflow from MPR
0
MR1
0
1
1
1
0
1
RFU
RFU
RFU
1
MR2
MR3
* 1 : BA2, A3 - A13 are reserved for future use (RFU) and must be programmed to 0 during MRS.
* 2 : The predefined pattern will be used for read synchronization.
* 3 : When MPR control is set for normal operation, MR3 A[2] = 0, MR3 A[1:0] will be ignored
AMS73CAG01808RA Rev. 1.0 December 2010
10
AMS [ Advanced Monolithic Systems Ltd ]
