LP62S16128B-I Series
AC Test Conditions
Input Pulse Levels
0.4V to 2.4V
5 ns
Input Rise And Fall Time
Input and Output Timing Reference Levels
Output Load
1.5V
See Figures 1 and 2
TTL
TTL
CL
CL
30pF
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ, tBHZ, tBLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = -40°C to 85°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR
VCC for Data Retention
2.0
3.6
V
CE ³ VCC - 0.2V or
LB = HB ³ VCC-0.2V
VCC = 2V,
CE ³ VCC - 0.2V or
ICCDR
Data Retention Current
-
3*
mA
LB = HB ³ VCC-0.2V
VIN ³ VCC - 0.2V or VIN £ 0.2V
tCDR
tR
Chip Disable to Data Retention Time
Operation Recovery Time
0
-
-
ns
ns
tRC
See Retention Waveform
VCC Rising Time from Data Retention
Voltage to Operating Voltage
tVR
5
-
ms
*
LP62S16128B-70LLI
ICCDR: max. 1mA at TA = 0°C to + 40°C
(August, 2001, Version 1.0)
11
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
