A62S6308 Series
Block Diagram
A0
VCC
GND
ROW
512 X 1024
A13
A14
A15
DECODER
MEMORY ARRAY
I/O1
COLUMN I/O
INPUT DATA
CIRCUIT
I/O8
CE2
CE1
OE
CONTROL
CIRCUIT
WE
Pin Descriptions - SOP
Pin Description - TSOP/sTSOP
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1,2
NC
No Connection
1 - 4, 7,
11 - 20, 31
A0 - A15
Address Inputs
Write Enable
3 - 12, 23,
25 - 28, 31
A0 - A15
Address Inputs
5
WE
CE2
VCC
NC
13 - 15,
17 - 21
6
8
Chip Enable
I/O1 - I/O8
Data Inputs/Outputs
Power Supply
No Connection
16
22
GND
CE1
OE
Ground
9, 10
Chip Enable
21 - 23,
25 - 29
I/O1 - I/O8
Data Inputs/Outputs
24
29
Output Enable
Write Enable
24
30
GND
CE1
OE
Ground
WE
CE2
VCC
Chip Enable
30
32
Chip Enable
32
Output Enable
Power Supply
(October, 1998, Version 2.0)
2
AMIC Technology, Inc.