A416316B Series
Selection Guide
Symbol
Description
-30
-35
-40
Unit
tRAC
30
35
40
ns
Maximum RAS Access Time
tAA
Maximum Column Address Access Time
16
10
18
11
20
12
ns
ns
tCAC
Maximum CAS Access Time
tOEA
10
11
12
ns
Maximum Output Enable ( OE ) Access Time
Minimum Read or Write Cycle Time
Minimum Fast Page Mode Cycle Time
Maximum Operating Current
tRC
tPC
65
19
95
2
70
21
85
2
75
23
75
2
ns
ns
ICC1
ICC6
mA
mA
Maximum CMOS Standby Current
Functional Description
The A416316B is a high performance CMOS Dynamic
Random Access Memory organized as 65,536 words X
16 bits. The A416316B is fabricated with advanced
CMOS technology and designed with innovative design
techniques resulting in high speed, extremely low power
and wide operating margins at component and system
levels.
address strobe (
and
) which acts as an
LCAS
UCAS
output enable independent of RAS . Very fast
and
UCAS
to output access time eases system design.
LCAS
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 256 X 16 bits
within a page, with cycle time as short as 19/21/23 ns.
The A416316B features a high speed page mode
operation in which high speed read, write and read-write
are performed on any of the bits defined by the column
address. The asynchronous column address uses an
extremely short row address capture time to ease the
system level timing constraints associated with
multiplexed addressing. Output is tri-stated by a column
The A416316B is best suited for graphics, digital signal
processing and high performance peripherals.
The A416316B is available in JEDEC standard 40-pin
plastic SOJ package and 40/44 TSOP type II package.
PRELIMINARY (November, 2000, Version 0.0)
2
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
