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A29400UV-55 参数 Datasheet PDF下载

A29400UV-55图片预览
型号: A29400UV-55
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8位/ 256K ×16位CMOS 5.0伏只,引导扇区闪存 [512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 33 页 / 499 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29400 Series  
Sector Protection/Unprotection  
Temporary Sector Unprotect  
The hardware sector protection feature disables both  
program and erase operations in any sector. The hardware  
sector unprotection feature re-enables both program and  
erase operations in previously protected sectors.  
This feature allows temporary unprotection of previous  
protected sectors to change data in-system. The Sector  
Unprotect mode is activated by setting the  
pin to  
RESET  
VID. During this mode, formerly protected sectors can be  
Sector protection/unprotection must be implemented using  
programming equipment. The procedure requires a high  
voltage (VID) on address pin A9 and the control pins.  
The device is shipped with all sectors unprotected.  
It is possible to determine whether a sector is protected or  
unprotected. See "Autoselect Mode" for details.  
programmed or erased by selecting the sector addresses.  
Once VID is removed from the  
pin, all the previously  
RESET  
protected sectors are protected again. Figure 1 shows the  
algorithm, and the Temporary Sector Unprotect diagram  
shows the timing waveforms, for this feature.  
Hardware Data Protection  
START  
The requirement of command unlocking sequence for  
programming or erasing provides data protection against  
inadvertent writes (refer to the Command Definitions table).  
In addition, the following hardware data protection measures  
prevent accidental erasure or programming, which might  
otherwise be caused by spurious system level signals during  
VCC power-up transitions, or from system noise. The device  
is powered up to read array data to avoid accidentally writing  
data to the array.  
RESET = VID  
(Note 1)  
Perform Erase or  
Program Operations  
Write Pulse "Glitch" Protection  
Noise pulses of less than 5ns (typical) on  
do not initiate a write cycle.  
,
or  
WE  
OE CE  
Logical Inhibit  
Write cycles are inhibited by holding any one of  
RESET = VIH  
=VIL,  
OE  
CE  
= VIH or  
= VIH. To initiate a write cycle,  
and  
WE  
CE  
must be a logical zero while  
is a logical one.  
WE  
OE  
Temporary Sector  
Unprotect  
Completed (Note 2)  
Power-Up Write Inhibit  
If  
=
= VIL and  
= VIH during power up, the  
OE  
WE  
device does not accept commands on the rising edge of  
. The internal state machine is automatically reset to  
CE  
WE  
reading array data on the initial power-up.  
Notes:  
1. All protected sectors unprotected.  
2. All previously protected sectors are protected once again.  
Figure 1. Temporary Sector Unprotect Operation  
PRELIMINARY  
(February, 2001, Version 0.1)  
8
AMIC Technology, Inc.