A29400 Series
Block Diagram
RY/BY
I/O0 - I/O15 (A-1)
VCC
VSS
Sector Switches
Input/Output
Buffers
Erase Voltage
Generator
RESET
State
Control
WE
BYTE
PGM Voltage
Generator
Command
Register
Chip Enable
Output Enable
Logic
STB
Data Latch
CE
OE
Y-Gating
Y-Decoder
STB
VCC Detector
Timer
A0-A17
X-decoder
Cell Matrix
Pin Descriptions
Pin No.
A0 - A17
I/O0 - I/O14
Description
Address Inputs
Data Inputs/Outputs
Data Input/Output, Word Mode
LSB Address Input, Byte Mode
Chip Enable
I/O15
I/O15 (A-1)
A-1
CE
WE
Write Enable
Output Enable
OE
Hardware Reset (N/A A294001)
Selects Byte Mode or Word Mode
RESET
BYTE
Ready/
Ground
- Output
RY/
BY
VSS
VCC
BUSY
Power Supply
PRELIMINARY
(February, 2001, Version 0.1)
3
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
