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A29400AUV-55F 参数 Datasheet PDF下载

A29400AUV-55F图片预览
型号: A29400AUV-55F
PDF下载: 下载PDF文件 查看货源
内容描述: [512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用:
文件页数/大小: 34 页 / 383 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29400A Series  
Absolute Maximum Ratings*  
*Comments  
Stresses above those listed under "Absolute Maximum  
Ratings" may cause permanent damage to this device.  
These are stress ratings only. Functional operation of  
this device at these or any other conditions above  
those indicated in the operational sections of these  
specification is not implied or intended. Exposure to  
the absolute maximum rating conditions for extended  
periods may affect device reliability.  
Ambient Operating Temperature ……...... -55°C to +125°C  
Storage Temperature ................................ -65°C to +150°C  
Ground to VCC ……………………………….... -2.0V to 6.5V  
Output Voltage (Note 1) ……………………… -2.0V to 6.5V  
A9,  
&
(Note 2) ………………… -2.0V to 11.5V  
RESET  
OE  
All other pins (Note 1) …………………………. -2.0V to 6.5V  
Output Short Circuit Current (Note 3) ………………. 200mA  
Notes:  
Operating Ranges  
1. Minimum DC voltage on input or I/O pins is -0.5V.  
During voltage transitions, inputs may undershoot VSS  
to -2.0V for periods of up to 20ns. Maximum DC voltage  
on output and I/O pins is VCC +0.5V. During voltage  
transitions, outputs may overshoot to VCC +1.5V for  
periods up to 20ns.  
Commercial Devices  
Ambient Temperature (TA) ……………………. 0°C to +70°C  
Extended Range Devices  
Ambient Temperature (TA) …………………. -40°C to +85°C  
2. Minimum DC input voltage on A9 pins is -0.5V. During  
VCC Supply Voltages  
voltage transitions, A9,  
and  
may overshoot  
RESET  
OE  
VSS to -2.0V for periods of up to 20ns. Maximum DC  
input voltage on A9 and is +11.5V which may  
VCC for ± 10% devices ……………………... +4.5V to +5.5V  
Operating ranges define those limits between which the  
functionally of the device is guaranteed.  
OE  
overshoot to 12.5V for periods up to 20ns.  
3. No more than one output is shorted at a time. Duration  
of the short circuit should not be greater than one  
second.  
Device Bus Operations  
This section describes the requirements and use of the  
device bus operations, which are initiated through the  
internal command register. The command register itself  
does not occupy any addressable memory location. The  
register is composed of latches that store the commands,  
along with the address and data information needed to  
execute the command. The contents of the register serve  
as inputs to the internal state machine. The state machine  
outputs dictate the function of the device. The appropriate  
device bus operations table lists the inputs and control  
levels required, and the resulting output. The following  
subsections describe each of these operations in further  
detail.  
Table 1. A29400A Device Bus Operations  
Operation  
A0 - A17  
I/O0 - I/O7  
I/O8 - I/O15  
=VIH  
WE  
CE  
OE  
RESET  
=VIL  
BYTE  
BYTE  
Read  
Write  
L
L
H
X
X
H
X
X
H
L
H
AIN  
AIN  
X
DOUT  
DIN  
DOUT  
DIN  
High-Z  
L
H
High-Z  
High-Z  
High-Z  
High-Z  
High-Z  
X
CMOS Standby  
TTL Standby  
X
X
H
X
X
High-Z  
High-Z  
High-Z  
High-Z  
DIN  
High-Z  
High-Z  
High-Z  
High-Z  
DIN  
VCC ± 0.5V  
VCC ± 0.5V  
H
L
H
H
X
Output Disable  
Hardware Reset  
X
X
X
L
X
Temporary Sector  
VID  
AIN  
Unprotect (See Note)  
Legend:  
L = Logic Low = VIL, H = Logic High = VIH, VID = 10.5 ± 1.0V, X = Don't Care, DIN = Data In, DOUT = Data Out, AIN = Address In  
Note:  
See the "Sector Protection/Unprotection" section and Temporary Sector Unprotect for more information.  
(August, 2015, Version 1.1)  
4
AMIC Technology, Corp.