A29160B Series
Timing Waveforms for Toggle Bit (During Embedded Algorithms)
tRC
Addresses
CE
VA
VA
VA
VA
t
ACC
CE
t
tCH
t
OE
OE
t
DF
t
OEH
WE
t
OH
I/O6
,
I/O2
High-Z
Valid Status
(first read)
Valid Status
Valid Status
Valid Data
t
BUSY
(second read)
(stop togging)
RY/BY
Note: VA = Valid Address; not required for I/O6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle.
PRELIMINARY (June, 2016, Version 0.0)
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AMIC Technology, Corp.